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Eojin Lee
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2020 – today
- 2024
- [j10]Sungmin Yun
, Hwayong Nam
GraNDe: Efficient Near-Data Processing Architecture for Graph Neural Networks. IEEE Trans. Computers 73(10): 2391-2404 (2024) - [c14]Juneseo Chang
IDT: Intelligent Data Placement for Multi-tiered Main Memory with Reinforcement Learning. HPDC 2024: 69-82 - [c13]Sungmin Yun
CLAY: CXL-based Scalable NDP Architecture Accelerating Embedding Layers. ICS 2024: 338-351 - 2023
- [j9]Yaebin Moon
ADT: Aggressive Demotion and Promotion for Tiered Memory. IEEE Comput. Archit. Lett. 22(1): 21-24 (2023) - [j8]Deok-Jae Oh, Yaebin Moon, Do Kyu Ham, Tae Jun Ham, Yongjun Park, Jae W. Lee, Jung Ho Ahn, Eojin Lee:
MaPHeA: A Framework for Lightweight Memory Hierarchy-aware Profile-guided Heap Allocation. ACM Trans. Embed. Comput. Syst. 22(1): 2:1-2:28 (2023) - [c12]Minbok Wi
SHADOW: Preventing Row Hammer in DRAM with Intra-Subarray Row Shuffling. HPCA 2023: 333-346 - [c11]Michael Jaemin Kim
How to Kill the Second Bird with One ECC: The Pursuit of Row Hammer Resilient DRAM. MICRO 2023: 986-1001 - 2022
- [j7]Sungmin Yun
GraNDe: Near-Data Processing Architecture With Adaptive Matrix Mapping for Graph Convolutional Networks. IEEE Comput. Archit. Lett. 21(2): 45-48 (2022) - [c10]Shinhaeng Kang, Sukhan Lee, Byeongho Kim, Hweesoo Kim, Kyomin Sohn, Nam Sung Kim, Eojin Lee:
An FPGA-based RNN-T Inference Accelerator with PIM-HBM. FPGA 2022: 146-152 - 2021
- [j6]Wonkyung Jung
Accelerating Fully Homomorphic Encryption Through Architecture-Centric Analysis and Optimization. IEEE Access 9: 98772-98789 (2021) - [j5]Byeongho Kim
TRiM: Tensor Reduction in Memory. IEEE Comput. Archit. Lett. 20(1): 5-8 (2021) - [j4]Daeyong Jin
A Deep Learning Model Using Satellite Ocean Color and Hydrodynamic Model to Estimate Chlorophyll-a Concentration. Remote. Sens. 13(10): 2003 (2021) - [c9]Heesu Kim, Hanmin Park, Taehyun Kim, Kwanheum Cho, Eojin Lee, Soojung Ryu, Hyuk-Jae Lee, Kiyoung Choi, Jinho Lee
GradPIM: A Practical Processing-in-DRAM Architecture for Gradient Descent. HPCA 2021: 249-262 - [c8]Sukhan Lee, Shinhaeng Kang, Jaehoon Lee, Hyeonsu Kim, Eojin Lee, Seungwoo Seo, Hosang Yoon, Seungwon Lee, Kyounghwan Lim, Hyunsung Shin, Jinhyun Kim, Seongil O, Anand Iyer, David Wang, Kyomin Sohn, Nam Sung Kim:
Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology : Industrial Product. ISCA 2021: 43-56 - [c7]Wonkyung Jung, Eojin Lee, Sangpyo Kim, Namhoon Kim, Keewoo Lee, Chohong Min, Jung Hee Cheon, Jung Ho Ahn
Accelerating Fully Homomorphic Encryption Through Microarchitecture-Aware Analysis and Optimization. ISPASS 2021: 237-239 - [c6]Deok-Jae Oh
MaPHeA: a lightweight memory hierarchy-aware profile-guided heap allocation framework. LCTES 2021: 24-36 - [c5]Jaehyun Park
TRiM: Enhancing Processor-Memory Interfaces with Scalable Tensor Reduction in Memory. MICRO 2021: 268-281 - [i2]Heesu Kim, Hanmin Park, Taehyun Kim, Kwanheum Cho, Eojin Lee, Soojung Ryu, Hyuk-Jae Lee, Kiyoung Choi, Jinho Lee:
GradPIM: A Practical Processing-in-DRAM Architecture for Gradient Descent. CoRR abs/2102.07511 (2021) - 2020
- [j3]Ingab Kang
CAT-TWO: Counter-Based Adaptive Tree, Time Window Optimized for DRAM Row-Hammer Prevention. IEEE Access 8: 17366-17377 (2020) - [j2]Byeongho Kim
MViD: Sparse Matrix-Vector Multiplication in Mobile DRAM for Accelerating Recurrent Neural Networks. IEEE Trans. Computers 69(7): 955-967 (2020) - [c4]Yeonhong Park, Woosuk Kwon, Eojin Lee, Tae Jun Ham, Jung Ho Ahn
Graphene: Strong yet Lightweight Row Hammer Protection. MICRO 2020: 1-13 - [i1]Wonkyung Jung, Eojin Lee, Sangpyo Kim, Keewoo Lee, Namhoon Kim, Chohong Min, Jung Hee Cheon, Jung Ho Ahn:
HEAAN Demystified: Accelerating Fully Homomorphic Encryption Through Architecture-centric Analysis and Optimization. CoRR abs/2003.04510 (2020)
2010 – 2019
- 2019
- [c3]Eojin Lee, Ingab Kang, Sukhan Lee, G. Edward Suh
TWiCe: preventing row-hammering by exploiting time window counters. ISCA 2019: 385-396 - 2018
- [j1]Eojin Lee
TWiCe: Time Window Counter Based Row Refresh to Prevent Row-Hammering. IEEE Comput. Archit. Lett. 17(1): 96-99 (2018) - 2017
- [c2]Yuhwan Ro, Hyunyoon Cho, Eojin Lee, Daejin Jung, Young Hoon Son, Jung Ho Ahn
SOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures. HPCA 2017: 517-528 - [c1]Eojin Lee, Jongwook Chung, Daejin Jung, Sukhan Lee, Sheng Li, Jung Ho Ahn
Work as a team or individual: Characterizing the system-level impacts of main memory partitioning. IISWC 2017: 156-166
Coauthor Index
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