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Umanath Kamath
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2020 – today
- 2021
- [c5]Umanath Kamath, Lorenzo Rota
, Aldo Pena-Perez, Bojan Markovic, Aseem Gupta, Camillo Tamma, Angelo Dragone
Reference Voltage Buffer for Hybrid RC-DAC SAR ADCs in 130 nm CMOS Process. ISCAS 2021: 1-4 - 2020
- [c4]Aseem Gupta, Aldo Pena-Perez, Bojan Markovic, Dionísio Doering, Benjamin Reese, Camillo Tamma, Hussein Ali, Pietro Caragiulo, Savino Petrignani, Lorenzo Rota
Read-Out Architecture of CRYO System-on-Chip ASIC for Noble Liquid TPC Detectors. MWSCAS 2020: 611-614
2010 – 2019
- 2019
- [j1]Umanath Kamath
A 1-V Bandgap Reference in 7-nm FinFET With a Programmable Temperature Coefficient and Inaccuracy of ±0.2% From -45°C to 125°C. IEEE J. Solid State Circuits 54(7): 1830-1840 (2019) - 2018
- [c3]Umanath Kamath, Edward Cullen, John Jennings, Ionut Cical, Darragh Walsh, Peng Lim, Brendan Farley, Robert Bogdan Staszewski
A 1 V Bandgap Reference in 7-nm FinFET with a Programmable Temperature Coefficient and an Inaccuracy of ±0.2% from -45°C to 125°C. ESSCIRC 2018: 78-81 - [c2]Umanath Kamath, Tao Yu, Wei Yao, Edward Cullen, John Jennings, Susan Wu, Peng Lim, Brendan Farley, Robert Bogdan Staszewski
BJT Device and Circuit Co-Optimization Enabling Bandgap Reference and Temperature Sensing in 7-nm FinFET. ESSDERC 2018: 86-89 - 2017
- [c1]Bruno Vaz, Adrian Lynam, Bob Verbruggen, Asma Laraba, Conrado Mesadri, Ali Boumaalif, John McGrath, Umanath Kamath, Ronnie De La Torre, Alvin Manlapat, Daire Breathnach, Christophe Erdmann, Brendan Farley:
16.1 A 13b 4GS/s digitally assisted dynamic 3-stage asynchronous pipelined-SAR ADC. ISSCC 2017: 276-277
Coauthor Index
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