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Suranga Handagala
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2020 – today
- 2024
- [c14]Sandeep Bal, Zhaoyang Han, Suranga Handagala, Mert Cevik, Michael Zink, Miriam Leeser:
P4-Based In-Network Telemetry for FPGAs in the Open Cloud Testbed and FABRIC. INFOCOM (Workshops) 2024: 1-6 - 2023
- [c13]Dana Diaconu, Yanyue Xie, Mehmet Güngör, Suranga Handagala, Xue Lin, Miriam Leeser:
Machine Learning Across Network-Connected FPGAs. HPEC 2023: 1-7 - [c12]Kai Huang, Mehmet Güngör, Suranga Handagala, Stratis Ioannidis, Miriam Leeser:
Accelerating Garbled Circuits in the Open Cloud Testbed with Multiple Network-Attached FPGAs. HPEC 2023: 1-8 - [c11]Zhaoyang Han, Suranga Handagala, Kalyani Patle, Michael Zink
, Miriam Leeser:
A Framework to Enable Runtime Programmable P4-enabled FPGAs in the Open Cloud Testbed. INFOCOM Workshops 2023: 1-6 - 2022
- [j5]Christophe Bobda
The Future of FPGA Acceleration in Datacenters and the Cloud. ACM Trans. Reconfigurable Technol. Syst. 15(3): 34:1-34:42 (2022) - [c10]Suranga Handagala, Miriam Leeser, Kalyani Patle, Michael Zink
Network Attached FPGAs in the Open Cloud Testbed (OCT). INFOCOM Workshops 2022: 1-6 - 2021
- [j4]Miriam Leeser
FPGAs in the Cloud. Comput. Sci. Eng. 23(6): 72-76 (2021) - [c9]Michael Zink, David E. Irwin, Emmanuel Cecchet, Hakan Saplakoglu, Orran Krieger, Martin C. Herbordt, Michael Daitzman, Peter Desnoyers, Miriam Leeser, Suranga Handagala:
The Open Cloud Testbed (OCT): A Platform for Research into new Cloud Technologies. CloudNet 2021: 140-147 - 2020
- [j3]Suranga Handagala, Miriam Leeser
Real Time Receiver Baseband Processing Platform for Sub 6 GHz PHY Layer Experiments. IEEE Access 8: 105571-105586 (2020) - [j2]Mohamed Mohamed, Suranga Handagala, Jieming Xu, Miriam Leeser
Strategies and Demonstration to Support Multiple Wireless Protocols with a Single RF Front-End. IEEE Wirel. Commun. 27(3): 88-95 (2020) - [c8]Suranga Handagala, Miriam Leeser:
Demonstrating Spectrally Efficient Asynchronous Coexistence for Machine Type Communication: A Software Defined Radio Approach. CrownCom 2020: 69-88
2010 – 2019
- 2019
- [j1]Yingying Wang
ΔΣ Noise-Shaping in 2-D Space-Time for Wideband Antenna Array Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(2): 569-582 (2019) - [c7]Miriam Leeser, Suranga Handagala, Mohamed Mohamed, Jieming Xu, Marvin Onabajo:
An FPGA Design Technique to Receive Multiple Wireless Protocols with the Same RF Front End. Wireless Days 2019: 1-6 - 2018
- [c6]Suranga Handagala, Mohamed Mohamed, Jieming Xu, Marvin Onabajo
Detection of Different Wireless Protocols on an FPGA with the Same Analog/RF Front End. CrownCom 2018: 25-35 - [c5]Najath Akram
Multiport ADCs for Microwave Focal Plane Array Dish Receivers. ISCAS 2018: 1-5 - 2017
- [c4]Benjamin Drozdenko, Suranga Handagala, Kaushik R. Chowdhury
FPGA modeling techniques for detecting and demodulating multiple wireless protocols. FPL 2017: 1-4 - [c3]Ali Nikoofard, Jifu Liang, Michael Twieg, Suranga Handagala, Arjuna Madanayake
Low-complexity N-port ADCs using 2-D Δ-Σ noise-shaping for N-element array receivers. MWSCAS 2017: 301-304 - [c2]Yingying Wang, Suranga Handagala, Arjuna Madanayake
N-port LNAs for mmW array processors using 2-D spatio-temporal Δ - Σ noise-shaping. MWSCAS 2017: 1473-1476 - 2015
- [c1]Suranga Handagala, Arjuna Madanayake
Design of a millimeter-wave dish-antenna based 3-D IIR radar digital velocity filter. nDS 2015: 1-6
Coauthor Index
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