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Darayus Adil Patel
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2020 – today
- 2022
- [c3]Darayus Adil Patel, Viet Phuong Bui, Kevin Tshun Chuan Chai, Amit Lal, Mohamed M. Sabry Aly:
SonicFFT: A system architecture for ultrasonic-based FFT acceleration. ASP-DAC 2022: 345-351
2010 – 2019
- 2016
- [b1]Darayus Adil Patel:
Test and characterization methodologies for advanced technology nodes. (Non traduit). University of Montpellier, France, 2016 - [j1]Kapil Juneja, Darayus Adil Patel, Rajesh Kumar Immadi, Balwant Singh, Sylvie Naudet, Pankaj Agarwal, Arnaud Virazel
, Patrick Girard:
An Effective Power-Aware At-Speed Test Methodology for IP Qualification and Characterization. J. Electron. Test. 32(6): 721-733 (2016) - [c2]Deepak-Kumar Arora, Darayus Adil Patel, Shahabuddin, Sanjay Kumar, Navin Kumar Dayani, Balwant Singh, Sylvie Naudet, Arnaud Virazel
Analysis of setup and hold margins inside silicon for advanced technology nodes. ISQED 2016: 295-300 - 2015
- [c1]Sylvain Clerc, Fady Abouzeid
Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technology. ISQED 2015: 366-370
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last updated on 2024-04-25 05:54 CEST by the dblp team
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