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Manolis Kaliorakis

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2020 – today

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2024
[c20]
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Georgios Grigoropoulos, Giannis Spiliopoulos, Ilias Chamatidis, Manolis Kaliorakis, Alexandros Troupiotis-Kapeliaris, Marios Vodas, Evangelia Filippou, Eva Chondrodima, Nikos Pelekis, Yannis Theodoridis, Dimitris Zissis, Konstantina Bereta:
A Scalable System for Maritime Route and Event Forecasting. EDBT 2024: 762-769
[c19]
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Georgios Grigoropoulos, Giannis Spiliopoulos, Ilias Chamatidis, Manolis Kaliorakis, Alexandros Troupiotis-Kapeliaris, Marios Vodas, Evangelia Filippou, Eva Chondrodima, Nikos Pelekis, Yannis Theodoridis, Dimitris Zissis, Konstantina Bereta:
GMSA: A Digital Twin Application for Maritime Route and Event Forecasting. EDBT 2024: 798-801
2023
[c18]
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Alexandros Troupiotis-Kapeliaris, Giannis Spiliopoulos, Georgios Grigoropoulos, Evangelia Filippou, Ilias Chamatidis, Marios Vodas, Manolis Kaliorakis, Dimitris Zissis:
A Digital Twin for Maritime Situational Awareness. BDCAT 2023: 26:1-26:2
2021
[i1]
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George Papadimitriou, Manolis Kaliorakis, Athanasios Chatzidimitriou, Dimitris Gizopoulos, Greg Favor, Kumar Sankaran, Shidhartha Das:
A System-Level Voltage/Frequency Scaling Characterization Framework for Multicore CPUs. CoRR abs/2106.09975 (2021)

2010 – 2019

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2019
[j3]
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Alessandro Vallero, Alessandro Savino, Athanasios Chatzidimitriou, Manolis Kaliorakis, Maha Kooli, Marc Riera, Martí Anglada, Giorgio Di Natale, Alberto Bosio, Ramon Canal, Antonio González, Dimitris Gizopoulos, Riccardo Mariani, Stefano Di Carlo:
SyRA: Early System Reliability Analysis for Cross-Layer Soft Errors Resilience in Memory Arrays of Microprocessor Systems. IEEE Trans. Computers 68(5): 765-783 (2019)
2018
[b1]
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Manolis Kaliorakis:
Methodologies for accelerated analysis of the reliability and the energy efficiency levels of modern microprocessor architectures. National and Kapodistrian University of Athens, Greece, 2018
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Manolis Kaliorakis, Athanasios Chatzidimitriou, George Papadimitriou, Dimitris Gizopoulos:
Statistical Analysis of Multicore CPUs Operation in Scaled Voltage Conditions. IEEE Comput. Archit. Lett. 17(2): 109-112 (2018)
[c17]
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Georgios Karakonstantis, Konstantinos Tovletoglou, Lev Mukhanov, Hans Vandierendonck, Dimitrios S. Nikolopoulos, Peter Lawthers, Panos K. Koutsovasilis, Manolis Maroudas, Christos D. Antonopoulos, Christos Kalogirou, Nikolaos Bellas, Spyros Lalis, Srikumar Venugopal, Arnau Prat-Pérez, Alejandro Lampropulos, Marios Kleanthous, Andreas Diavastos, Zacharias Hadjilambrou, Panagiota Nikolaou, Yiannakis Sazeides, Pedro Trancoso, George Papadimitriou, Manolis Kaliorakis, Athanasios Chatzidimitriou, Dimitris Gizopoulos, Shidhartha Das:
An energy-efficient and error-resilient server ecosystem exceeding conservative scaling limits. DATE 2018: 1099-1104
[c16]
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Konstantinos Tovletoglou, Lev Mukhanov, Georgios Karakonstantis, Athanasios Chatzidimitriou, George Papadimitriou, Manolis Kaliorakis, Dimitris Gizopoulos, Zacharias Hadjilambrou, Yiannakis Sazeides, Alejandro Lampropulos, Shidhartha Das, Phong Vo:
Measuring and Exploiting Guardbands of Server-Grade ARMv8 CPU Cores and DRAMs. DSN Workshops 2018: 6-9
[c15]
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George Papadimitriou, Athanasios Chatzidimitriou, Manolis Kaliorakis, Yannos Vastakis, Dimitris Gizopoulos:
Micro-Viruses for Fast System-Level Voltage Margins Characterization in Multicore CPUs. ISPASS 2018: 54-63
2017
[c14]
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Athanasios Chatzidimitriou, Manolis Kaliorakis, Dimitris Gizopoulos, Maurizio Iacaruso, Mauro Pipponzi, Riccardo Mariani, Stefano Di Carlo:
RT Level vs. Microarchitecture-Level Reliability Assessment: Case Study on ARM(R) Cortex(R)-A9 CPU. DSN Workshops 2017: 117-120
[c13]
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George Papadimitriou, Manolis Kaliorakis, Athanasios Chatzidimitriou, Charalampos Magdalinos, Dimitris Gizopoulos:
Voltage margins identification on commercial x86-64 multicore microprocessors. IOLTS 2017: 51-56
[c12]
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Manolis Kaliorakis, Dimitris Gizopoulos, Ramon Canal, Antonio González:
MeRLiN: Exploiting Dynamic Instruction Behavior for Fast and Accurate Microarchitecture Level Reliability Assessment. ISCA 2017: 241-254
[c11]
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George Papadimitriou, Manolis Kaliorakis, Athanasios Chatzidimitriou, Dimitris Gizopoulos, Peter Lawthers, Shidhartha Das:
Harnessing voltage margins for energy efficiency in multicore CPUs. MICRO 2017: 503-516
[c10]
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Athanasios Chatzidimitriou, Manolis Kaliorakis, Sotiris Tselonis, Dimitris Gizopoulos:
Performance-aware reliability assessment of heterogeneous chips. VTS 2017: 1-6
2016
[c9]
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Alessandro Vallero, Alessandro Savino, Gianfranco Politano, Stefano Di Carlo, Athanasios Chatzidimitriou, Sotiris Tselonis, Manolis Kaliorakis, Dimitris Gizopoulos, Marc Riera, Ramon Canal, Antonio González, Maha Kooli, Alberto Bosio, Giorgio Di Natale:
Cross-layer system reliability assessment framework for hardware faults. ITC 2016: 1-10
[c8]
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Sotiris Tselonis, Manolis Kaliorakis, Nikos Foutris, George Papadimitriou, Dimitris Gizopoulos:
Microprocessor reliability-performance tradeoffs assessment at the microarchitecture level. VTS 2016: 1-6
2015
[j1]
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Alessandro Vallero, Sotiris Tselonis, Nikos Foutris, Manolis Kaliorakis, Maha Kooli, Alessandro Savino, Gianfranco Politano, Alberto Bosio, Giorgio Di Natale, Dimitris Gizopoulos, Stefano Di Carlo:
Cross-layer reliability evaluation, moving from the hardware architecture to the system level: A CLERECO EU project overview. Microprocess. Microsystems 39(8): 1204-1214 (2015)
[c7]
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Manolis Kaliorakis, Sotiris Tselonis, Athanasios Chatzidimitriou, Dimitris Gizopoulos:
Accelerated microarchitectural Fault Injection-based reliability assessment. DFTS 2015: 47-52
[c6]
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Alessandro Vallero, Alessandro Savino, Sotiris Tselonis, Nikos Foutris, Manolis Kaliorakis, Gianfranco Politano, Dimitris Gizopoulos, Stefano Di Carlo:
A Bayesian model for system level reliability estimation. ETS 2015: 1-2
[c5]
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Manolis Kaliorakis, Sotiris Tselonis, Athanasios Chatzidimitriou, Nikos Foutris, Dimitris Gizopoulos:
Differential Fault Injection on Microarchitectural Simulators. IISWC 2015: 172-182
[c4]
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Alessandro Vallero, Alessandro Savino, Sotiris Tselonis, Nikos Foutris, Manolis Kaliorakis, Gianfranco Politano, Dimitris Gizopoulos, Stefano Di Carlo:
Bayesian network early reliability evaluation analysis for both permanent and transient faults. IOLTS 2015: 7-12
2014
[c3]
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Nikos Foutris, Manolis Kaliorakis, Sotiris Tselonis, Dimitris Gizopoulos:
Versatile architecture-level fault injection framework for reliability evaluation: A first report. IOLTS 2014: 140-145
[c2]
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Manolis Kaliorakis, Mihalis Psarakis, Nikos Foutris, Dimitris Gizopoulos:
Accelerated online error detection in many-core microprocessor architectures. VTS 2014: 1-6
2013
[c1]
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Manolis Kaliorakis, Nikos Foutris, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis:
Online error detection in multiprocessor chips: A test scheduling study. IOLTS 2013: 169-172

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