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Benny Akesson
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- affiliation: Embedded Systems Innovation, Eindhoven, The Netherlands
- affiliation (former): Polytechnic Institute of Porto, Portugal
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2020 – today
- 2024
- [c60]Saeedeh Baneshi, Anuj Pathania, Benny Akesson, Andy D. Pimentel, Ana Lucia Varbanescu:
Analyzing Per-Application Energy Consumption in a Multi-Application Computing Continuum. FMEC 2024: 30-37 - [c59]Faezeh Sadat Saadatmand, Todor P. Stefanov, Ignacio González Alonso, Andy D. Pimentel, Benny Akesson, Marius Herget, Martin Bor:
Automated Derivation of Application Workload Models for Design Space Exploration of Industrial Distributed Cyber-Physical Systems. ICPS 2024: 1-8 - 2023
- [c58]Saeedeh Baneshi, Ana Lucia Varbanescu, Anuj Pathania, Benny Akesson, Andy D. Pimentel:
Analyzing Digital Services Across the Compute Continuum Using iFogSim. RTCSA 2023: 279-280 - [c57]Saeedeh Baneshi, Ana Lucia Varbanescu, Anuj Pathania, Benny Akesson, Andy D. Pimentel
:
Estimating the Energy Consumption of Applications in the Computing Continuum with iFogSim. ISC Workshops 2023: 234-249 - [c56]Teun Hendriks, Benny Akesson, Jeroen Voeten, Martijn Hendriks, Javier Coronel Parada
Thirteen concepts to play it safe with the cloud. SysCon 2023: 1-7 - 2022
- [j21]Benny Akesson
A comprehensive survey of industry practice in real-time systems. Real Time Syst. 58(3): 358-398 (2022) - [c55]Bart-Jan Hilbrands, Debjyoti Bera, Benny Akesson:
Partial Specifications of Component-Based Systems using Petri Nets. PNSE@Petri Nets 2022: 21-39 - [c54]Marius Herget
Design Space Exploration for Distributed Cyber-Physical Systems: State-of-the-art, Challenges, and Directions. DSD 2022: 632-640 - 2021
- [j20]Ishfaq Hussain
Response time analysis of multiframe mixed-criticality systems with arbitrary deadlines. Real Time Syst. 57(1-2): 141-189 (2021) - [j19]Anna Minaeva
Control Performance Optimization for Application Integration on Automotive Architectures. IEEE Trans. Computers 70(7): 1059-1073 (2021) - [c53]Madiou Diallo, Benny Akesson, Debjyoti Bera, Ronald Begeer:
Synthetic Portnet Generation with Controllable Complexity for Testing and Benchmarking. PNSE@Petri Nets 2021: 195-212 - [c52]Bram van der Sanden, Yonghui Li, Joris van den Aker, Benny Akesson, Tjerk Bijlsma, Martijn Hendriks, Kostas Triantafyllidis, Jacques Verriet, Jeroen Voeten, Twan Basten:
Model-driven system-performance engineering for cyber-physical systems. EMSOFT 2021: 11-22 - [d2]Bram van der Sanden
Data set of paper Model-Driven System-Performance Engineering for Cyber-Physical Systems. Version 1. Zenodo, 2021 [all versions] - [d1]Bram van der Sanden
Data set of paper Model-Driven System-Performance Engineering for Cyber-Physical Systems. Version 1.0.0. Zenodo, 2021 [all versions] - 2020
- [c51]Benjamin Rouxel, Ulrik Pagh Schultz
PReGO: a generative methodology for satisfying real-time requirements on COTS-based systems: definition and experience report. GPCE 2020: 70-83 - [c50]Benny Akesson, Mitra Nasri
An Empirical Survey-based Study into Industry Practice in Real-time Systems. RTSS 2020: 3-11
2010 – 2019
- 2019
- [j18]Muhammad Ali Awan
Uneven memory regulation for scheduling IMA applications on multi-core platforms. Real Time Syst. 55(2): 248-292 (2019) - [j17]Muhammad Ali Awan
Techniques and Analysis for Mixed-criticality Scheduling with Mode-dependent Server Execution Budgets. ACM Trans. Embed. Comput. Syst. 18(5s): 109:1-109:23 (2019) - [c49]Benny Akesson, Jack Sleuters, Sven Weiss, Ronald Begeer:
Towards Continuous Evolution through Automatic Detection and Correction of Service Incompatibilities. MDE4IoT/ModComp@MoDELS 2019: 65-72 - [c48]Muhammad Ali Awan
Memory Bandwidth Regulation for Multiframe Task Sets. RTCSA 2019: 1-11 - [c47]Ishfaq Hussain
Response time analysis of multiframe mixed-criticality systems. RTNS 2019: 8-18 - 2018
- [j16]Muhammad Ali Awan
Worst-case Stall Analysis for Multicore Architectures with Two Memory Controllers (Artifact). Dagstuhl Artifacts Ser. 4(2): 05:1-05:3 (2018) - [j15]Anna Minaeva
Time-Triggered Co-Scheduling of Computation and Communication with Jitter Requirements. IEEE Trans. Computers 67(1): 115-129 (2018) - [c46]Muhammad Ali Awan
Mixed-criticality scheduling with memory bandwidth regulation. DATE 2018: 1277-1282 - [c45]Muhammad Ali Awan
Worst-case Stall Analysis for Multicore Architectures with Two Memory Controllers. ECRTS 2018: 2:1-2:22 - [c44]Benny Akesson, Jozef Hooman, Roy Dekker, Willemien Ekkelkamp, Bas Stottelaar:
Pain-mitigation Techniques for Model-based Engineering using Domain-specific Languages. MODELSWARD 2018: 752-764 - [c43]Muhammad Ali Awan
Mixed-Criticality Scheduling with Dynamic Memory Bandwidth Regulation. RTCSA 2018: 111-117 - 2017
- [j14]Manil Dev Gomony
A Globally Arbitrated Memory Tree for Mixed-Time-Criticality Systems. IEEE Trans. Computers 66(2): 212-225 (2017) - [j13]Hazem Ismail Ali, Sander Stuijk
Reducing the Complexity of Dataflow Graphs Using Slack-Based Merging. ACM Trans. Design Autom. Electr. Syst. 22(2): 24:1-24:22 (2017) - [c42]Muhammad Ali Awan
Mixed-Criticality Scheduling with Dynamic Redistribution of Shared Cache. ECRTS 2017: 18:1-18:21 - [c41]Matthias Becker, Borislav Nikolic, Dakshina Dasari, Benny Akesson, Vincent Nélis
Partitioning and Analysis of the Network-on-Chip on a COTS Many-Core Platform. RTAS 2017: 101-112 - [c40]Hazem Ismail Ali, Benny Akesson, Luís Miguel Pinho
Combining Dataflow Applications and Real-time Task Sets on Multi-core Platforms. SCOPES 2017: 60-63 - [p2]Kees Goossens, Martijn Koedam, Andrew Nelson, Shubhendu Sinha, Sven Goossens, Yonghui Li, Gabriela Breaban, Reinier van Kampenhout, Rasool Tavakoli, Juan Valencia, Hadi Ahmadi Balef, Benny Akesson, Sander Stuijk
NoC-Based Multiprocessor Architecture for Mixed-Time-Criticality Applications. Handbook of Hardware/Software Codesign 2017: 491-530 - [i3]Muhammad Ali Awan, Konstantinos Bletsas, Pedro F. Souto, Benny Akesson, Eduardo Tovar:
Mixed-criticality Scheduling with Dynamic Redistribution of Shared Cache. CoRR abs/1704.08876 (2017) - [i2]Anna Minaeva, Benny Akesson, Zdenek Hanzálek, Dakshina Dasari:
Time-Triggered Co-Scheduling of Computation and Communication with Jitter Requirements. CoRR abs/1711.00398 (2017) - [i1]Anna Minaeva, Premysl Sucha, Benny Akesson, Zdenek Hanzálek:
Scalable and Efficient Configuration of Time-Division Multiplexed Resources. CoRR abs/1711.09590 (2017) - 2016
- [j12]Anna Minaeva, Premysl Sucha, Benny Akesson
Scalable and efficient configuration of time-division multiplexed resources. J. Syst. Softw. 113: 44-58 (2016) - [j11]Dakshina Dasari
A framework for memory contention analysis in multi-core platforms. Real Time Syst. 52(3): 272-322 (2016) - [j10]Yonghui Li, Benny Akesson
Architecture and analysis of a dynamically-scheduled real-time memory controller. Real Time Syst. 52(5): 675-729 (2016) - [j9]Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens:
Power/Performance Trade-Offs in Real-Time SDRAM Command Scheduling. IEEE Trans. Computers 65(6): 1882-1895 (2016) - [c39]Matthias Becker, Dakshina Dasari, Borislav Nikolic, Benny Akesson, Vincent Nélis
Contention-Free Execution of Automotive Applications on a Clustered Many-Core Platform. ECRTS 2016: 14-24 - [c38]Syed Aftab Rashid, Geoffrey Nelissen
Cache-Persistence-Aware Response-Time Analysis for Fixed-Priority Preemptive Systems. ECRTS 2016: 262-272 - [c37]Yonghui Li, Benny Akesson, Kai Lampka, Kees Goossens:
Modeling and Verification of Dynamic Command Scheduling for Real-Time Memory Controllers. RTAS 2016: 85-96 - 2015
- [j8]Andrew Nelson, Kees Goossens, Benny Akesson
Dataflow formalisation of real-time streaming applications on a Composable and Predictable Multi-Processor SOC. J. Syst. Archit. 61(9): 435-448 (2015) - [j7]Martin Schoeberl
T-CREST: Time-predictable multi-core architecture for embedded systems. J. Syst. Archit. 61(9): 449-471 (2015) - [j6]Vítor Rodrigues
Certifying execution time in multicores. Sci. Comput. Program. 111: 505-534 (2015) - [j5]Manil Dev Gomony
A Real-Time Multichannel Memory Controller and Optimal Mapping of Memory Clients to Memory Channels. ACM Trans. Embed. Comput. Syst. 14(2): 25:1-25:27 (2015) - [j4]Davit Mirzoyan, Benny Akesson
Maximizing the Number of Good Dies for Streaming Applications in NoC-Based MPSoCs Under Process Variation. ACM Trans. Embed. Comput. Syst. 14(4): 83:1-83:26 (2015) - [c36]Manil Dev Gomony, Jamie Garside, Benny Akesson, Neil C. Audsley, Kees Goossens:
A generic, scalable and globally arbitrated memory tree for shared DRAM access in real-time systems. DATE 2015: 193-198 - [c35]Yonghui Li, Hrishikesh Salunkhe
Mode-controlled data-flow modeling of real-time memory controllers. ESTIMedia 2015: 1-10 - [c34]Hazem Ismail Ali, Benny Akesson, Luís Miguel Pinho
Generalized Extraction of Real-Time Parameters for Homogeneous Synchronous Dataflow Graphs. PDP 2015: 701-710 - [c33]Benny Akesson, Anna Minaeva, Premysl Sucha, Andrew Nelson, Zdenek Hanzálek
An efficient configuration methodology for time-division multiplexed single resources. RTAS 2015: 161-171 - 2014
- [j3]Paulo Baltarejo Sousa
Unified overhead-aware schedulability analysis for slot-based task-splitting. Real Time Syst. 50(5-6): 680-735 (2014) - [j2]Davit Mirzoyan, Benny Akesson
Process-variation-aware mapping of best-effort and real-time streaming applications to MPSoCs. ACM Trans. Embed. Comput. Syst. 13(2s): 61:1-61:24 (2014) - [c32]Karthik Chandrasekar, Sven Goossens, Christian Weis, Martijn Koedam, Benny Akesson, Norbert Wehn, Kees Goossens:
Exploiting expendable process-margins in DRAMs for run-time performance optimization. DATE 2014: 1-6 - [c31]Manil Dev Gomony
Coupling TDM NoC and DRAM controller for cost and performance optimization of real-time systems. DATE 2014: 1-6 - [c30]Yonghui Li, Benny Akesson
Dynamic Command Scheduling for Real-Time Memory Controllers. ECRTS 2014: 3-14 - 2013
- [c29]Sven Goossens, Jasper Kuijsten, Benny Akesson
A reconfigurable real-time SDRAM controller for mixed time-criticality systems. CODES+ISSS 2013: 2:1-2:10 - [c28]Karthik Chandrasekar, Christian Weis, Benny Akesson
Towards variation-aware system-level power estimation of DRAMs: an empirical approach. DAC 2013: 23:1-23:8 - [c27]Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn
System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs. DATE 2013: 236-241 - [c26]Hardik Shah, Alois C. Knoll
Bounding SDRAM interference: detailed analysis vs. latency-rate analysis. DATE 2013: 308-313 - [c25]Sven Goossens, Benny Akesson, Kees Goossens:
Conservative open-page policy for mixed time-criticality memory controllers. DATE 2013: 525-530 - [c24]Manil Dev Gomony
Architecture and optimal configuration of a real-time multi-channel memory controller. DATE 2013: 1307-1312 - [c23]Sahar Foroutan, Benny Akesson
A General Framework for Average-Case Performance Analysis of Shared Resources. DSD 2013: 78-85 - [c22]Davit Mirzoyan, Sander Stuijk
Throughput analysis and Voltage-Frequency Island partitioning for streaming applications under process variation. ESTIMedia 2013: 1-10 - [c21]Sven Goossens, Benny Akesson
The CompSOC design flow for virtual execution platforms. FPGAworld 2013: 7:1-7:6 - [c20]Vítor Rodrigues
A Declarative Compositional Timing Analysis for Multicores Using the Latency-Rate Abstraction. PADL 2013: 43-59 - [c19]Hazem Ismail Abdel Aziz Ali, Luís Miguel Pinho
Critical-Path-First based allocation of real-time streaming applications on 2D mesh-type multi-cores. RTCSA 2013: 201-208 - [c18]Dakshina Dasari, Benny Akesson
Identifying the sources of unpredictability in COTS-based multicore systems. SIES 2013: 39-48 - 2012
- [c17]Karthik Chandrasekar, Benny Akesson
Run-time power-down strategies for real-time SDRAM memory controllers. DAC 2012: 988-993 - [c16]Manil Dev Gomony
DRAM selection and configuration for real-time mobile systems. DATE 2012: 51-56 - [c15]Sven Goossens, Tim Kouters, Benny Akesson, Kees Goossens:
Memory-map selection for firm real-time SDRAM controllers. DATE 2012: 828-831 - [c14]Gervin Thomas, Karthik Chandrasekar, Benny Akesson
A Predictor-Based Power-Saving Policy for DRAM Memories. DSD 2012: 882-889 - [c13]Andrew Nelson, Benny Akesson
Power versus quality trade-offs for adaptive real-time applications. ESTIMedia 2012: 75-84 - [c12]Davit Mirzoyan, Benny Akesson
Process-variation aware mapping of real-time streaming applications to MPSoCs for improved yield. ISQED 2012: 41-48 - 2011
- [c11]Benny Akesson
Memory controllers for high-performance and real-time MPSoCs: requirements, architectures, and future trends. CODES+ISSS 2011: 3-12 - [c10]Sander Stuijk
Designing next-generation real-time streaming systems. CODES+ISSS 2011: 375-376 - [c9]Benny Akesson, Kees Goossens:
Architectures and modeling of predictable memory controllers for improved system integration. DATE 2011: 851-856 - [c8]Karthik Chandrasekar, Benny Akesson
Improved Power Modeling of DDR SDRAMs. DSD 2011: 99-108 - [c7]Benny Akesson
Automatic Generation of Efficient Predictable Memory Patterns. RTCSA (1) 2011: 177-184 - [c6]Firew Siyoum, Benny Akesson
Resource-Efficient Real-Time Scheduling Using Credit-Controlled Static-Priority Arbitration. RTCSA (1) 2011: 309-318 - [p1]Benny Akesson
Composability and Predictability for Independent Application Development, Verification, and Execution. Multiprocessor System-on-Chip 2011: 25-56 - 2010
- [c5]Benny Akesson
Classification and Analysis of Predictable Memory Patterns. RTCSA 2010: 367-376
2000 – 2009
- 2009
- [j1]Andreas Hansson, Benny Akesson, Jef L. van Meerbergen:
Multi-processor programming in the embedded system curriculum. SIGBED Rev. 6(1): 9 (2009) - [c4]Benny Akesson
Composable Resource Sharing Based on Latency-Rate Servers. DSD 2009: 547-555 - [c3]Benny Akesson
Efficient Service Allocation in Hardware Using Credit-Controlled Static-Priority Arbitration. RTCSA 2009: 59-68 - 2008
- [c2]Benny Akesson
Real-Time Scheduling Using Credit-Controlled Static-Priority Arbitration. RTCSA 2008: 3-14 - 2007
- [c1]Benny Akesson
Predator: a predictable SDRAM memory controller. CODES+ISSS 2007: 251-256
Coauthor Index
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last updated on 2024-12-13 19:05 CET by the dblp team
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