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Fernanda D. V. R. Oliveira
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2020 – today
- 2024
- [j7]Filipe Igreja
, Pedro Lara
Analyzing the LMS Weight Error Covariance Matrix: An Exact Expectation Approach. Circuits Syst. Signal Process. 43(7): 4390-4411 (2024) - [j6]Lucas Paiva R. da Silva
Tracking Analysis of the ℓ 0-LMS Algorithm. Circuits Syst. Signal Process. 43(12): 7867-7893 (2024) - [j5]Alexandre B. Z. de França
Hardware designs for convolutional neural networks: Memoryful, memoryless and cached. Integr. 94: 102074 (2024) - [c15]Victor R. R. de Oliveira, Mirella M. de O. Carneiro, Carlos Fernando Teodósio Soares, Fernanda D. V. R. Oliveira, José Gabriel R. C. Gomes:
MOSFET-C Filter Design using Genetic Algorithm with Restricted Mutation for Gate Multiplicity. LASCAS 2024: 1-5 - [c14]Victor R. R. de Oliveira, Mirella M. de O. Carneiro, Fernanda D. V. R. Oliveira, Fernando Antonio Pinto Barúqui, José Gabriel R. C. Gomes:
Layout Design of an Asynchronous Time-Based Image Sensor with Shared DVS Module. SBCCI 2024: 1-5 - 2023
- [c13]Roberto Gonçalves Pacheco, Fernanda D. V. R. Oliveira, Rodrigo S. Couto:
Redes Neurais Profundas com Saídas Antecipadas para Imagens com Distorção em Ambientes de Nuvem. SBRC 2023: 532-545 - 2022
- [c12]Marcelle Caruzo Xavier
Neuromorphic Hardware Applied in the Development of Low-Power IoTs. SIoT 2022: 1-4 - 2021
- [c11]Roberto Gonçalves Pacheco, Fernanda D. V. R. Oliveira, Rodrigo S. Couto
Early-exit deep neural networks for distorted images: providing an efficient edge offloading. GLOBECOM 2021: 1-6 - [c10]Alexandre B. Z. de França, Fernanda D. V. R. Oliveira, José Gabriel Rodríguez Carneiro Gomes, Nadia Nedjah:
Non-Memoryless vs. Memoryless Hardware Architectures for Convolutional Neural Networks. LASCAS 2021: 1-4 - [i1]Roberto Gonçalves Pacheco, Fernanda D. V. R. Oliveira, Rodrigo S. Couto:
Early-exit deep neural networks for distorted images: providing an efficient edge offloading. CoRR abs/2108.09343 (2021) - 2020
- [j4]Gustavo M. S. Nunes
Comparison between Digital Tone-Mapping Operators and a Focal-Plane Pixel-Parallel Circuit. Signal Process. Image Commun. 88: 115937 (2020) - [j3]Thiago T. P. Silva, Pedro Lara, Filipe Igreja, Fernanda D. V. R. Oliveira, Luís Tarrataca
An Exact Expectation Model for the LMS Tracking Abilities. IEEE Trans. Signal Process. 68: 5882-5893 (2020) - [c9]Tiago M. de F. Lopes, Victor R. R. de Oliveira, Fernanda D. V. R. Oliveira, José Gabriel Rodríguez Carneiro Gomes:
Event-Based CMOS Image Sensor with Shared DVS Module for Pixel Area Reduction. SBCCI 2020: 1-6
2010 – 2019
- 2018
- [c8]Gustavo M. S. Nunes
Color Tone-Mapping Circuit for a Focal-Plane Implementation. ISCAS 2018: 1-5 - 2017
- [j2]Fernanda D. V. R. Oliveira
Gaussian Pyramid: Comparative Analysis of Hardware Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(9): 2308-2321 (2017) - 2016
- [c7]Fernanda D. V. R. Oliveira, José Gabriel R. C. Gomes, Ricardo Carmona-Galán
Focal-Plane Scale Space Generation with a 6T Pixel Architecture. IMSE 2016: 1-8 - [c6]Jorge Fernández-Berni, Fernanda D. V. R. Oliveira, Ricardo Carmona-Galán
Image Sensing Scheme Enabling Fully-Programmable Light Adaptation and Tone Mapping with a Single Exposure: Demo. ICDSC 2016: 202-203 - [c5]Fernanda D. V. R. Oliveira, Tiago M. de F. Lopes, José Gabriel Rodríguez Carneiro Gomes, Fernando Antonio Pinto Barúqui, Antonio Petraglia:
Focal-plane image encoder with cascode current mirrors and increased vector quantization bit rate. SBCCI 2016: 1-6 - [c4]Eloy Parra-Barrero, Jorge Fernández-Berni, Fernanda D. V. R. Oliveira, Ricardo Carmona-Galán, Ángel Rodríguez-Vázquez:
High-level Performance Evaluation of Object Detection based on Massively Parallel Focal-plane Acceleration Requiring Minimum Pixel Area Overhead. VISIGRAPP (3: VISAPP) 2016: 81-87 - 2015
- [c3]Fernanda D. V. R. de Oliveira, José Gabriel Rodríguez Carneiro Gomes, Ricardo Carmona-Galán
CMOS image sensor architecture for focal plane early vision processing. ICDSC 2015: 213-214 - [c2]Fernanda D. V. R. Oliveira, José Gabriel Rodríguez Carneiro Gomes, Antonio Petraglia:
Influence of cascode and simple current mirrors in inner product implementations for CMOS imagers. LASCAS 2015: 1-4 - 2013
- [j1]Fernanda D. V. R. Oliveira, Hugo de Lemos Haas, José Gabriel Rodríguez Carneiro Gomes, Antonio Petraglia:
CMOS Imager With Focal-Plane Analog Image Compression Combining DPCM and VQ. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(5): 1331-1344 (2013) - 2012
- [c1]Fernanda D. V. R. Oliveira, Hugo de Lemos Haas, José Gabriel Rodríguez Carneiro Gomes, Antonio Petraglia:
Current-mode analog integrated circuit for focal-plane image compression. SBCCI 2012: 1-6
Coauthor Index
aka: José Gabriel Rodríguez Carneiro Gomes
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