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Byeong Yong Kong
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2020 – today
- 2024
- [c15]Byeong Yong Kong:
Statistical Analysis of Bitwise Early Termination for Iterative Multiuser Detection in IDMA Systems. ICEIC 2024: 1-3 - [c14]Sangil Han, Jaehee Kim, Dongyun Kam, Byeong Yong Kong, Mijung Kim, Young-Seok Kim, Youngjoo Lee:
Constrained Sorter Design using Zero-One Principle. ISCAS 2024: 1-5 - 2023
- [j14]Dongyun Kam, Byeong Yong Kong, Youngjoo Lee:
Low-Latency SCL Polar Decoder Architecture Using Overlapped Pruning Operations. IEEE Trans. Circuits Syst. I Regul. Pap. 70(3): 1417-1427 (2023) - [c13]Byeong Yong Kong, Hoyoung Yoo, Youngjoo Lee:
An Automated Synthesis Framework for Fast Evaluation of Maximum Operating Frequency. ICEIC 2023: 1-4 - 2022
- [j13]Sangbu Yun, Byeong Yong Kong, Youngjoo Lee:
Area- and Energy-Efficient LDPC Decoder Using Mixed-Resolution Check-Node Processing. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 999-1003 (2022) - [j12]Byeong Yong Kong:
A 97-mW Bitwise-Early-Terminating Multiuser Detector for IDMA Systems. IEEE Trans. Circuits Syst. II Express Briefs 69(8): 3390-3394 (2022) - [c12]Dongyun Kam, Byeong Yong Kong, Youngjoo Lee:
A 1.1μs 1.56Gb/s/mm2 Cost-Efficient Large-List SCL Polar Decoder Using Fully-Reusable LLR Buffers in 28nm CMOS Technology. VLSI Technology and Circuits 2022: 204-205 - 2021
- [j11]Byeong Yong Kong:
Bitwise Early Termination of Multiuser Detection for IDMA Systems. IEEE Commun. Lett. 25(9): 2998-3002 (2021) - [j10]Suchang Kim, Seungho Na, Byeong Yong Kong, Jaewoong Choi, In-Cheol Park:
Real-Time SSDLite Object Detection on FPGA. IEEE Trans. Very Large Scale Integr. Syst. 29(6): 1192-1205 (2021) - [c11]Dongyun Kam, Byeong Yong Kong, Youngjoo Lee:
Low-Latency Polar Decoder Using Overlapped SCL Processing. ICASSP 2021: 4860-4864 - 2020
- [j9]Byeong Yong Kong, Jooseung Lee, In-Cheol Park:
A Low-Latency Multi-Touch Detector Based on Concurrent Processing of Redesigned Overlap Split and Connected Component Analysis. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(1): 166-176 (2020) - [j8]Byeong Yong Kong, In-Cheol Park:
A 120-mW 0.16-ms-Latency Connectivity-Scalable Multiuser Detector for Interleave Division Multiple Access. IEEE Trans. Circuits Syst. II Express Briefs 67-II(3): 470-474 (2020) - [j7]Jaewoong Choi, Byeong Yong Kong, In-Cheol Park:
Retrain-Less Weight Quantization for Multiplier-Less Convolutional Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(3): 972-982 (2020) - [c10]Byeong Yong Kong:
Improved Parallel-IDMA Architecture with Low-Complexity Elementary Signal Estimators. ISCAS 2020: 1-4 - [c9]Byeong Yong Kong, Jooseung Lee, In-Cheol Park:
A Low-Latency Multi-Touch Detector Based on Concurrent Processing of Redesigned Overlap Split and Connected Component Analysis. ISCAS 2020: 1 - [c8]Byeong Yong Kong, In-Cheol Park:
A 120-mW 0.16-ms-Latency Connectivity-Scalable Multiuser Detector for Interleave Division Multiple Access. ISCAS 2020: 1 - [c7]Sangbu Yun, Dongyun Kam, Jeongwon Choe, Byeong Yong Kong, Youngjoo Lee:
Ultra-Low-Latency LDPC Decoding Architecture using Reweighted Offset Min-Sum Algorithm. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [c6]Byeong Yong Kong, In-Cheol Park:
Parallel IDMA Architecture Based on Interleaving with Replicated Subpatterns. ICC 2019: 1-6 - 2018
- [j6]Byeong Yong Kong, In-Cheol Park:
A Memory-Efficient IDMA Architecture Based on On-the-Fly Despreading. IEEE J. Solid State Circuits 53(11): 3327-3337 (2018) - [c5]Byeong Yong Kong, Jaehwan Jung, In-Cheol Park:
Interference Cancellation Architecture for Pipelined Parallel MIMO Detectors. ICECS 2018: 77-80 - [c4]Byeong Yong Kong, In-Cheol Park:
Efficient Implementation of Multiple Interleavers in IDMA for 5G. ISOCC 2018: 119-120 - 2017
- [j5]Byeong Yong Kong, In-Cheol Park:
Improved Sorting Architecture for K-Best MIMO Detection. IEEE Trans. Circuits Syst. II Express Briefs 64-II(9): 1042-1046 (2017) - 2016
- [j4]Byeong Yong Kong, Hoyoung Yoo, In-Cheol Park:
Efficient Sorting Architecture for Successive-Cancellation-List Decoding of Polar Codes. IEEE Trans. Circuits Syst. II Express Briefs 63-II(7): 673-677 (2016) - [c3]Byeong Yong Kong, In-Cheol Park:
Low-complexity symbol detection for massive MIMO uplink based on Jacobi method. PIMRC 2016: 1-5 - 2015
- [c2]Byeong Yong Kong, In-Cheol Park:
Narrow-range frequency estimation based on comprehensive optimization of DFT and interpolation. ICASSP 2015: 2609-2613 - 2014
- [j3]Byeong Yong Kong, Jihyuck Jo, Hyewon Jeong, Mina Hwang, Soyoung Cha, Bongjin Kim, In-Cheol Park:
Low-Complexity Low-Latency Architecture for Matching of Data Encoded With Hard Systematic Error-Correcting Codes. IEEE Trans. Very Large Scale Integr. Syst. 22(7): 1648-1652 (2014) - 2013
- [j2]Byeong Yong Kong, In-Cheol Park:
Efficient Tree-Traversal Strategy for Soft-Output MIMO Detection Based on Candidate-Set Reorganization. IEEE Commun. Lett. 17(9): 1758-1761 (2013) - [c1]Byeong Yong Kong, In-Cheol Park:
Adaptive Metric Calculation for Improving Detection Capability of MIMO Detectors. VTC Spring 2013: 1-5 - 2012
- [j1]Byeong Yong Kong, In-Cheol Park:
FIR Filter Synthesis Based on Interleaved Processing of Coefficient Generation and Multiplier-Block Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(8): 1169-1179 (2012)
Coauthor Index
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last updated on 2024-08-05 20:20 CEST by the dblp team
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