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Nobuhiko Sugino
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2010 – 2019
- 2016
- [j5]Udomchai Techavipoo, Denchai Worasawate, Wittawat Boonleelakul, Rachaporn Keinprasit, Treepop Sunpetchniyom, Nobuhiko Sugino, Pairash Thajchayapong:
Toward Optimal Computation of Ultrasound Image Reconstruction Using CPU and GPU. Sensors 16(12): 1986 (2016) - 2013
- [c5]Teerapat Sanguankotchakorn, Sanika K. Wijayasekara, Nobuhiko Sugino:
A Cross-layer design approach in OLSR MANET using BER and weighted Connectivity Index. ICON 2013: 1-6 - 2012
- [c4]Teerapat Sanguankotchakorn, Shradha Shrestha, Nobuhiko Sugino:
Effective Ad Hoc Social Networking on OLSR MANET Using Similarity of Interest Approach. IDCS 2012: 15-28
2000 – 2009
- 2007
- [j4]Takefumi Miyoshi, Nobuhiko Sugino:
Compiler for Architecture with Dynamic Reconfigurable Processing Unit by Use of Automatic Assignment Method of Sub-Programs Based on Their Quantitative Evaluation. IEICE Trans. Inf. Syst. 90-D(12): 1967-1976 (2007) - [j3]Takefumi Miyoshi, Nobuhiko Sugino:
Fine-grain compensation method with consideration of trade-offs between computation and data transfer for power consumption. SIGARCH Comput. Archit. News 35(5): 39-44 (2007) - 2005
- [j2]Takefumi Miyoshi, Nobuhiko Sugino:
Unified Phase Compiler by Use of 3-D Representation Space. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(4): 838-845 (2005) - [j1]Yuhei Kaneko, Nobuhiko Sugino, Akinori Nishihara:
Memory Allocation and Code Optimization Methods for DSPs with Indexed Auto-Modification. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(4): 846-854 (2005) - [c3]Nobuhiko Sugino, Tomoyuki Matsuura, Akinori Nishihara:
New graph transformation schemes in graph-based memory allocation method for an indirect addressing DSP. ISCAS (5) 2005: 4855-4858 - 2002
- [c2]Yuhei Kaneko, Nobuhiko Sugino, Akinori Nishihara:
Memory allocation method for indirect addressing with an index register. APCCAS (1) 2002: 199-202
1990 – 1999
- 1999
- [c1]Nobuhiko Sugino, Harushige Funaki, Akinori Nishihara:
Memory address allocation method for a indirect addressing DSP with consideration of modification in local computational order. ISCAS (3) 1999: 496-499
Coauthor Index
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