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Rawan Naous
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2020 – today
- 2022
- [c9]Hidehiro Fujiwara, Haruki Mori, Wei-Chang Zhao, Mei-Chen Chuang, Rawan Naous, Chao-Kai Chuang, Takeshi Hashizume, Dar Sun, Chia-Fu Lee, Kerem Akarvardar, Saman Adham, Tan-Li Chou, Mahmut Ersin Sinangil, Yih Wang
, Yu-Der Chih, Yen-Huei Chen, Hung-Jen Liao, Tsung-Yung Jonathan Chang:
A 5-nm 254-TOPS/W 221-TOPS/mm2 Fully-Digital Computing-in-Memory Macro Supporting Wide-Range Dynamic-Voltage-Frequency Scaling and Simultaneous MAC and Write Operations. ISSCC 2022: 1-3 - 2021
- [j5]Mahmut E. Sinangil
A 7-nm Compute-in-Memory SRAM Macro Supporting Multi-Bit Input, Weight and Output and Achieving 351 TOPS/W and 372.4 GOPS. IEEE J. Solid State Circuits 56(1): 188-198 (2021) - [c8]Yu-Der Chih, Po-Hao Lee, Hidehiro Fujiwara, Yi-Chun Shih, Chia-Fu Lee, Rawan Naous, Yu-Lin Chen, Chieh-Pu Lo
An 89TOPS/W and 16.3TOPS/mm2 All-Digital SRAM-Based Full-Precision Compute-In Memory Macro in 22nm for Machine-Learning Edge Applications. ISSCC 2021: 252-254
2010 – 2019
- 2019
- [j4]Ren Li
Approximate Computing With Stochastic Transistors' Voltage Over-Scaling. IEEE Access 7: 6373-6385 (2019) - [i3]Rawan Naous, Lazar Supic, Yoonhwan Kang, Ranko Seradejovic, Anish Singhani, Vladimir Stojanovic:
Tuning Algorithms and Generators for Efficient Edge Inference. CoRR abs/1908.02239 (2019) - 2018
- [i2]Lazar Supic, Rawan Naous, Ranko Sredojevic, Aleksandra Faust, Vladimir Stojanovic:
MPDCompress - Matrix Permutation Decomposition Algorithm for Deep Neural Network Compression. CoRR abs/1805.12085 (2018) - 2017
- [c7]Mohamed A. Bahloul
Hardware emulation of Memristor based Ternary Content Addressable Memory. SDD 2017: 446-449 - [c6]Mohamed A. Bahloul
Design and analysis of 2T-2M Ternary content addressable memories. MWSCAS 2017: 1430-1433 - [i1]Ranko Sredojevic, Shaoyi Cheng, Lazar Supic, Rawan Naous, Vladimir Stojanovic:
Structured Deep Neural Network Pruning via Matrix Pivoting. CoRR abs/1712.01084 (2017) - 2016
- [j3]Rawan Naous, Mohammed Affan Zidan, Ahmed K. Sultan, Khaled Nabil Salama:
Statistical Analysis for Memristor Crossbar Memories. Int. J. Unconv. Comput. 12(4): 251-264 (2016) - [j2]Rawan Naous
Pilot assisted readout for passive memristor crossbars. Microelectron. J. 54: 48-58 (2016) - [c5]Rawan Naous
Channel equalization techniques for non-volatile memristor memories. CISS 2016: 111-116 - [c4]Abdullah Alhalafi
gTBS: A green Task-Based Sensing for energy efficient Wireless Sensor Networks. INFOCOM Workshops 2016: 136-143 - [c3]Rawan Naous
Stochastic synaptic plasticity with memristor crossbar arrays. ISCAS 2016: 2078-2081 - 2015
- [j1]Maruan Al-Shedivat
Memristors Empower Spiking Neurons With Stochasticity. IEEE J. Emerg. Sel. Topics Circuits Syst. 5(2): 242-253 (2015) - [c2]Maruan Al-Shedivat, Rawan Naous
Inherently stochastic spiking neurons for probabilistic neural computation. NER 2015: 356-359
2000 – 2009
- 2007
- [c1]Mazen A. R. Saghir, Rawan Naous:
A Configurable Multi-ported Register File Architecture for Soft Processor Cores. ARC 2007: 14-25
Coauthor Index
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