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Takeshi Kumaki
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2020 – today
- 2024
- [c28]Miho Yamada, Takeshi Kumaki, Kyosuke Kageyama:
Verification of Animal External Ear Model-based Microphone Sensor for Hazardous Sound Detection. ATAIT 2024: 69-75 - [c27]Tomoki Yamashita, Shunsuke Inoue, Arata Ikeda, Takeshi Kumaki:
Live Demonstration : Development of invisible color information and QR code lighting display for novel digital signage. GCCE 2024: 236-237 - 2022
- [c26]Yusuke Inoue, Xiangbo Kong, Takeshi Kumaki:
Implementation of AI characteristic motion detecting for improper-photography prevention system. ISOCC 2022: 201-202 - [c25]Yuta Moritake, Ryuya Kirihara, Yuki Hirota, Takumi Hayashi, Xiangbo Kong, Takeshi Kumaki:
Development and evaluation of the "Stego-panel IV" Invisible information lighting display. MWSCAS 2022: 1-4 - 2021
- [c24]Yuta Moritake, Yutaro Shimomura, Ryuya Kirihara, Yuki Hirota, Xiangbo Kong, Takeshi Kumaki:
Development of invisible information lighting display "Stego-panel IV". GCCE 2021: 73-74 - [c23]Yan Zhu, Sei Arima, Ryo Hirayama, Masaaki Kobayashi, Takeshi Kumaki:
A Study on Specific Emitter Identification Using Modified Allan Variance and Correlation Coefficient. GCCE 2021: 505-506 - [c22]Sota Arai, Kyosuke Kageyama, Xiangbo Kong, Takeshi Kumaki:
Implementation and Evaluation of Block Cipher Algorithm with Content Addressable Memory-Based Massive-Parallel SIMD Matrix Core. GCCE 2021: 913-914 - 2020
- [c21]Yutaro Shimomura, Takuya Shimada, Ryuya Kirihara, Takeshi Kumaki:
Live Demonstration: Development of LED-Based Stego-Panel for New Smartphone Usage. ISCAS 2020: 1 - [c20]Kyosuke Kageyama, Kensuke Watanabe, Akimitsu Hamai, Takeshi Kumaki, Tetsushi Koide:
Acceleration of arithmetic processing with CAM-based massive-parallel SIMD matrix core. MWSCAS 2020: 486-489
2010 – 2019
- 2019
- [c19]Kyosuke Kageyama, Takeshi Kumaki, Tetsushi Koide:
Structuring Element-counting Approach for Morphological Pattern Spectrum-based Image Manipulation Detection. ISDCS 2019: 1-4 - [c18]Takeshi Kumaki, Tomohiro Fujita, Takeshi Ogura, P. S. Venugopala:
Distributed Embedding Approach for Max-Plus Algebra-Based Morphological Wavelet Transform Watermarking. NEWCAS 2019: 1-4 - 2017
- [j9]Takeshi Kumaki, Takeshi Fujino:
Hierarchical-Masked Image Filtering for Privacy-Protection. IEICE Trans. Inf. Syst. 100-D(10): 2327-2338 (2017) - 2015
- [c17]Kyosuke Kageyama, Kohei Sugiyama, Takeshi Kumaki, Takeshi Fujino:
Development of LED illumination-based spy photo-prevention system. GCCE 2015: 129-130 - [c16]Takato Iwase, Yusuke Nozaki, Masaya Yoshikawa, Takeshi Kumaki:
Detection technique for hardware Trojans using machine learning in frequency domain. GCCE 2015: 185-186 - [c15]Masaya Yoshikawa, Takuya Tsukadaira, Takeshi Kumaki:
Design and LSI prototyping of security module with hardware trojan. ICCE 2015: 426-427 - [c14]Kyosuke Kageyama, Kohei Sugiyama, Takeshi Kumaki, Takeshi Fujino:
Proposal of LED-based Peeping Prevention System. MWSCAS 2015: 1-4 - 2014
- [j8]Takeshi Kumaki, Kei Nakao, Kohei Hozumi, Takeshi Ogura, Takeshi Fujino:
Development of Compression Tolerable and Highly Implementable Watermarking Method for Mobile Devices. IEICE Trans. Inf. Syst. 97-D(3): 593-596 (2014) - [c13]Takeshi Kumaki, Takeshi Fujino, Tetsushi Koide:
Interleaved-bitslice AES encryption and decryption with massive-parallel mobile embedded processor. APCCAS 2014: 359-362 - [c12]Yuki Yanagihara, Toshiya Honda, Takeshi Kumaki, Takeshi Fujino:
Live Demonstration: Hierarchical masked image filtering technology on security-camera for privacy protection. ISCAS 2014: 473 - [c11]Tomohiro Fujita, Syo Sawada, Kaihei Iwanaga, Takeshi Kumaki, Mamoru Nakanishi, Takeshi Ogura:
Cellular automaton based pixel-level snakes. NEWCAS 2014: 393-396 - 2013
- [c10]Kosaku Fukuda, Lin Meng
, Takeshi Kumaki, Takeshi Ogura:
A CAM-Based Separated BTB for a Superscalar Processor. CANDAR 2013: 385-388 - [c9]Masaya Yoshikawa, R. Satoh, Takeshi Kumaki:
Hardware Trojan for security LSI. ICCE 2013: 29-30 - [c8]Takeshi Kumaki, Masaya Yoshikawa, Takeshi Fujino:
Cipher-destroying and secret-key-emitting hardware Trojan against AES core. MWSCAS 2013: 408-411 - [c7]Kei Nakao, Kohei Hozumi, Takeshi Kumaki, Takeshi Ogura, Takeshi Fujino:
Development of effective information-hiding method for embedded systems. MWSCAS 2013: 1298-1301 - [c6]Toshiya Honda, Yuma Murakami, Yuki Yanagihara, Takeshi Kumaki, Takeshi Fujino:
Hierarchical image-scrambling method with scramble-level controllability for privacy protection. MWSCAS 2013: 1371-1374 - [c5]Matsui Takao, Tomohiro Fujita, Tsuji Yuji, Takeshi Kumaki, Mamoru Nakanishi, Takeshi Ogura:
Evaluation of advanced pixel-level snakes on cellular hardware platform. NEWCAS 2013: 1-4 - 2011
- [j7]Takeshi Kumaki, Tetsushi Koide, Hans Jürgen Mattausch, Masaharu Tagami, Masakatsu Ishizaki:
Software-Based Parallel Cryptographic Solution with Massive-Parallel Memory-Embedded SIMD Matrix Architecture for Data-Storage Systems. IEICE Trans. Inf. Syst. 94-D(9): 1742-1754 (2011) - [j6]Takashi Kurafuji, Masaru Haraguchi, Masami Nakajima, Tetsu Nishijima, Tetsushi Tanizaki, Hiroyuki Yamasaki, Takeaki Sugimura, Yuta Imai, Masakatsu Ishizaki, Takeshi Kumaki, Kan Murata, Kanako Yoshida, Eisuke Shimomura, Hideyuki Noda, Yoshihiro Okuno, Shunsuke Kamijo, Tetsushi Koide, Hans Jürgen Mattausch, Kazutami Arimoto:
A Scalable Massively Parallel Processor for Real-Time Image Processing. IEEE J. Solid State Circuits 46(10): 2363-2373 (2011) - 2010
- [c4]Takashi Kurafuji, Masaru Haraguchi, Masami Nakajima, Takayuki Gyohten, Tetsu Nishijima, Hiroyuki Yamasaki, Yuta Imai, Masakatsu Ishizaki, Takeshi Kumaki, Yoshihiro Okuno, Tetsushi Koide, Hans Jürgen Mattausch, Kazutami Arimoto:
A scalable massively parallel processor for real-time image processing. ISSCC 2010: 334-335
2000 – 2009
- 2008
- [j5]Takeshi Kumaki, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch, Yasuto Kuroda, Takayuki Gyohten, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito:
Integration Architecture of Content Addressable Memory and Massive-Parallel Memory-Embedded SIMD Matrix for Versatile Multimedia Processor. IEICE Trans. Electron. 91-C(9): 1409-1418 (2008) - 2007
- [j4]Takeshi Kumaki, Yasuto Kuroda, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito:
Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table Optimizer. IEICE Trans. Inf. Syst. 90-D(1): 334-345 (2007) - [j3]Takeshi Kumaki, Yutaka Kono, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch:
Scalable FPGA/ASIC Implementation Architecture for Parallel Table-Lookup-Coding Using Multi-Ported Content Addressable Memory. IEICE Trans. Inf. Syst. 90-D(1): 346-354 (2007) - [j2]Takeshi Kumaki, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch, Yasuto Kuroda, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito:
Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor. IEICE Trans. Inf. Syst. 90-D(8): 1312-1315 (2007) - [c3]Takeshi Kumaki, Tetsushi Koide, Hans Jürgen Mattausch, Yasuto Kuroda, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito:
Efficient Vertical/Horizontal-Space 1D-DCT Processing Based on Massive-Parallel Matrix-Processing Engine. ISCAS 2007: 525-528 - 2006
- [j1]Takeshi Kumaki, Keisuke Iwai, Takakazu Kurokawa:
A flexible multiport content-addressable memory. Syst. Comput. Jpn. 37(11): 57-67 (2006) - [c2]Takeshi Kumaki, Y. Kouno, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch:
Application of Multi-ported CAM for Parallel Coding. APCCAS 2006: 1859-1862 - 2005
- [c1]Takeshi Kumaki, Yasuto Kuroda, Tetsushi Koide, Hans Jürgen Mattausch, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito:
CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table [image coding example]. ISCAS (5) 2005: 5202-5205
Coauthor Index
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