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Andrew S. Cassidy
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2020 – today
- 2024
- [c26]Andrew S. Cassidy, John V. Arthur, Filipp Akopyan, Alexander Andreopoulos, Rathinakumar Appuswamy, Pallab Datta, Michael V. DeBole, Steven K. Esser, Carlos Ortega Otero, Jun Sawada, Brian Taba, Arnon Amir, Deepika Bablani, Peter J. Carlson, Myron D. Flickner, Rajamohan Gandhasri, Guillaume Garreau, Megumi Ito
, Jennifer L. Klamo, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Jeffrey L. McKinstry, Yutaka Y. Nakamura, Tapan K. Nayak, William P. Risk, Kai Schleupen, Ben Shaw, Jay Sivagnaname, Daniel F. Smith, Ignacio Terrizzano, Takanori Ueda, Dharmendra S. Modha:
11.4 IBM NorthPole: An Architecture for Neural Network Inference with a 12nm Chip. ISSCC 2024: 214-215 - 2023
- [c25]Dharmendra S. Modha, Filipp Akopyan, Alexander Andreopoulos, Rathinakumar Appuswamy, John V. Arthur, Andrew S. Cassidy, Pallab Datta, Michael V. DeBole, Steven K. Esser, Carlos Ortega Otero, Jun Sawada, Brian Taba, Arnon Amir, Deepika Bablani, Peter J. Carlson, Myron D. Flickner, Rajamohan Gandhasri, Guillaume Garreau, Megumi Ito
IBM NorthPole Neural Inference Machine. HCS 2023: 1-58
2010 – 2019
- 2019
- [j10]Michael V. DeBole
TrueNorth: Accelerating From Zero to 64 Million Neurons in 10 Years. Computer 52(5): 20-29 (2019) - 2018
- [j9]Germain Haessig
Spiking Optical Flow for Event-Based Sensors Using IBM's TrueNorth Neurosynaptic System. IEEE Trans. Biomed. Circuits Syst. 12(4): 860-870 (2018) - [c24]Daniel R. Mendat, Andrew S. Cassidy, Guido Zarrella, Andreas G. Andreou
Word2vec Word Similarities on IBM's TrueNorth Neurosynaptic System. BioCAS 2018: 1-4 - 2017
- [j8]Wei-Yu Tsai, Davis R. Barch, Andrew S. Cassidy, Michael V. DeBole, Alexander Andreopoulos, Bryan L. Jackson, Myron D. Flickner, John V. Arthur, Dharmendra S. Modha, John Sampson, Vijaykrishnan Narayanan:
Always-On Speech Recognition Using TrueNorth, a Reconfigurable, Neurosynaptic Processor. IEEE Trans. Computers 66(6): 996-1007 (2017) - [i5]Germain Haessig, Andrew Cassidy, Rodrigo Alvarez-Icaza, Ryad Benosman, Garrick Orchard:
Spiking Optical Flow for Event-based Sensors Using IBM's TrueNorth Neurosynaptic System. CoRR abs/1710.09820 (2017) - 2016
- [j7]Steven K. Esser, Paul A. Merolla, John V. Arthur, Andrew S. Cassidy, Rathinakumar Appuswamy, Alexander Andreopoulos, David J. Berg, Jeffrey L. McKinstry, Timothy Melano, Davis R. Barch, Carmelo di Nolfo, Pallab Datta, Arnon Amir
Convolutional networks for fast, energy-efficient neuromorphic computing. Proc. Natl. Acad. Sci. USA 113(41): 11441-11446 (2016) - [c23]Peter U. Diehl, Guido Zarrella, Andrew Cassidy, Bruno U. Pedroni, Emre Neftci:
Conversion of artificial recurrent neural networks to spiking neural networks for low-power neuromorphic hardware. ICRC 2016: 1-8 - [c22]Wei-Yu Tsai, Davis R. Barch, Andrew S. Cassidy, Michael V. DeBole, Alexander Andreopoulos, Bryan L. Jackson, Myron D. Flickner, Dharmendra S. Modha, Jack Sampson, Vijaykrishnan Narayanan:
LATTE: Low-power Audio Transform with TrueNorth Ecosystem. IJCNN 2016: 4270-4277 - [c21]Peter U. Diehl, Bruno U. Pedroni, Andrew Cassidy, Paul Merolla, Emre Neftci, Guido Zarrella:
TrueHappiness: Neuromorphic emotion recognition on TrueNorth. IJCNN 2016: 4278-4285 - [c20]Alexander Andreopoulos, Rodrigo Alvarez-Icaza, Andrew S. Cassidy, Myron D. Flickner:
A low-power neurosynaptic implementation of Local Binary Patterns for texture analysis. IJCNN 2016: 4308-4316 - [c19]Andreas G. Andreou
Real-time sensory information processing using the TrueNorth Neurosynaptic System. ISCAS 2016: 2911 - [c18]Jun Sawada, Filipp Akopyan, Andrew S. Cassidy, Brian Taba, Michael V. DeBole, Pallab Datta, Rodrigo Alvarez-Icaza, Arnon Amir
Truenorth ecosystem for brain-inspired computing: scalable systems, software, and applications. SC 2016: 130-141 - [i4]Peter U. Diehl, Bruno U. Pedroni, Andrew Cassidy, Paul Merolla, Emre Neftci, Guido Zarrella:
TrueHappiness: Neuromorphic Emotion Recognition on TrueNorth. CoRR abs/1601.04183 (2016) - [i3]Peter U. Diehl, Guido Zarrella, Andrew S. Cassidy, Bruno U. Pedroni, Emre Neftci:
Conversion of Artificial Recurrent Neural Networks to Spiking Neural Networks for Low-power Neuromorphic Hardware. CoRR abs/1601.04187 (2016) - [i2]Steven K. Esser, Paul A. Merolla, John V. Arthur, Andrew S. Cassidy, Rathinakumar Appuswamy, Alexander Andreopoulos, David J. Berg, Jeffrey L. McKinstry, Timothy Melano, Davis R. Barch, Carmelo di Nolfo, Pallab Datta, Arnon Amir, Brian Taba, Myron D. Flickner, Dharmendra S. Modha:
Convolutional Networks for Fast, Energy-Efficient Neuromorphic Computing. CoRR abs/1603.08270 (2016) - 2015
- [j6]Alexander Andreopoulos, Brian Taba, Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Myron Flickner, William P. Risk, Arnon Amir
Visual saliency on networks of neurosynaptic cores. IBM J. Res. Dev. 59(2/3) (2015) - [j5]Filipp Akopyan, Jun Sawada, Andrew Cassidy, Rodrigo Alvarez-Icaza, John V. Arthur, Paul Merolla, Nabil Imam, Yutaka Y. Nakamura, Pallab Datta, Gi-Joon Nam, Brian Taba, Michael P. Beakes, Bernard Brezzo, Jente B. Kuang, Rajit Manohar, William P. Risk, Bryan L. Jackson, Dharmendra S. Modha:
TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(10): 1537-1557 (2015) - [c17]Srinjoy Das, Bruno Umbria Pedroni, Paul Merolla, John V. Arthur, Andrew S. Cassidy, Bryan L. Jackson, Dharmendra S. Modha, Gert Cauwenberghs
Gibbs sampling with low-power spiking digital neurons. ISCAS 2015: 2704-2707 - [i1]Srinjoy Das, Bruno U. Pedroni, Paul Merolla, John V. Arthur, Andrew S. Cassidy, Bryan L. Jackson, Dharmendra S. Modha, Gert Cauwenberghs, Kenneth Kreutz-Delgado:
Gibbs Sampling with Low-Power Spiking Digital Neurons. CoRR abs/1503.07793 (2015) - 2014
- [c16]Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Filipp Akopyan, Jun Sawada, John V. Arthur, Paul Merolla, Pallab Datta, Marc González Tallada, Brian Taba, Alexander Andreopoulos, Arnon Amir
Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ~100× Speedup in Time-to-Solution and ~100, 000× Reduction in Energy-to-Solution. SC 2014: 27-38 - 2013
- [j4]Guillaume Mantelet, Andrew Cassidy, Christine Tremblay
Establishment of Dynamic Lightpaths in Filterless Optical Networks. JOCN 5(9): 1057-1065 (2013) - [j3]Andrew S. Cassidy, Julius Georgiou
Design of silicon brains in the nano-CMOS era: Spiking neurons, learning synapses and neural architecture optimization. Neural Networks 45: 4-26 (2013) - [c15]Arnon Amir
Cognitive computing programming paradigm: A Corelet Language for composing networks of neurosynaptic cores. IJCNN 2013: 1-10 - [c14]Andrew S. Cassidy, Paul Merolla, John V. Arthur, Steven K. Esser, Bryan L. Jackson, Rodrigo Alvarez-Icaza, Pallab Datta, Jun Sawada, Theodore M. Wong, Vitaly Feldman, Arnon Amir
Cognitive computing building block: A versatile and efficient digital neuron model for neurosynaptic cores. IJCNN 2013: 1-10 - [c13]Steven K. Esser, Alexander Andreopoulos, Rathinakumar Appuswamy, Pallab Datta, Davis Barch, Arnon Amir
Cognitive computing systems: Algorithms and applications for networks of neurosynaptic cores. IJCNN 2013: 1-10 - 2012
- [j2]Andrew S. Cassidy, Andreas G. Andreou
Beyond Amdahl's Law: An Objective Function That Links Multiprocessor Performance Gains to Delay and Energy. IEEE Trans. Computers 61(8): 1110-1126 (2012) - [c12]John V. Arthur, Paul Merolla, Filipp Akopyan, Rodrigo Alvarez-Icaza, Andrew Cassidy, Shyamal Chandra, Steven K. Esser, Nabil Imam, William P. Risk, Daniel Ben Dayan Rubin
Building block of a programmable neuromorphic substrate: A digital neurosynaptic core. IJCNN 2012: 1-8 - 2011
- [c11]Andrew Cassidy, Andreas G. Andreou
Design of a one million neuron single FPGA neuromorphic system for real-time multimodal scene analysis. CISS 2011: 1-6 - [c10]Julius Georgiou
A multimodal-corpus data collection system for cognitive acoustic scene analysis. CISS 2011: 1-6 - [c9]Philippe O. Pouliquen, Andrew Cassidy, Andreas G. Andreou
A wireless architecture for distributed sensing/actuation and pre-processing with microsecond synchronization. CISS 2011: 1-6 - [c8]Andrew Cassidy, Kai Yu, Haolang Zhou, Andreas G. Andreou:
A high-level analytical model for application specific CMP design exploration. DATE 2011: 1095-1100 - [c7]Andrew Cassidy, Andreas G. Andreou
A combinational digital logic approach to STDP. ISCAS 2011: 673-676 - [c6]Andrew Cassidy, Thomas S. Murray, Andreas G. Andreou
Evaluating on-chip interconnects for low operating frequency silicon neuron arrays. ISCAS 2011: 2437-2440
2000 – 2009
- 2009
- [c5]Andrew Cassidy, Andreas G. Andreou
Analytical methods for the design and optimization of chip-multiprocessor architectures. CISS 2009: 482-487 - [c4]Werner Spiegl, Georg Stemmer, Eva Lasarcyk, Varada Kolhatkar, Andrew Cassidy, Blaise Potard, Stephen Shum, Young Chol Song, Puyang Xu, Peter Beyerlein, James D. Harnsberger, Elmar Nöth:
Analyzing features for automatic age estimation on cross-sectional data. INTERSPEECH 2009: 2923-2926 - [c3]Fopefolu O. Folowosele, Andre V. Harrison
A Switched Capacitor Implementation of the Generalized Linear Integrate-and-fire Neuron. ISCAS 2009: 2149-2152 - 2005
- [j1]JoAnn M. Paul, Donald E. Thomas, Andrew S. Cassidy:
High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors. ACM Trans. Design Autom. Electr. Syst. 10(3): 431-461 (2005) - 2003
- [c2]Andrew S. Cassidy, JoAnn M. Paul, Donald E. Thomas:
Layered, Multi-Threaded, High-Level Performance Design. DATE 2003: 10954-10959 - 2002
- [c1]Andrew S. Cassidy, Christopher P. Andrews
System-Level Modeling of a Network Switch SoC. ISSS 2002: 62-67
Coauthor Index
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last updated on 2024-10-07 21:20 CEST by the dblp team
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