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Ming Cong
This is just a disambiguation page, and is not intended to be the bibliography of an actual person. The links to all actual bibliographies of persons of the same or a similar name can be found below. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
Person information
Other persons with the same name
- Ming Cong 0001
— Dalian University of Technology, School of Mechanical Engineering, Dalian, China (and 1 more)
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2010 – 2019
- 2019
- [j4]Guifei Wang, Ming Cong, Xiang Ren, Haiying Wen, Wenlong Qin:
Chewing-Cycle trajectory Planning for a Dental Testing chewing robot. Int. J. Robotics Autom. 34(3) (2019) - 2017
- [j3]Qianguo Xing
High-Resolution Satellite Observations of a New Hazard of Golden Tides Caused by Floating Sargassum in Winter in the Yellow Sea. IEEE Geosci. Remote. Sens. Lett. 14(10): 1815-1819 (2017) - 2016
- [j2]Ming Cong, Xinjun Wu
A Longitudinal Mode Electromagnetic Acoustic Transducer (EMAT) Based on a Permanent Magnet Chain for Pipe Inspection. Sensors 16(5): 740 (2016) - 2014
- [j1]Liwei Chen, Ming Cong, Jing Huang, Ling Li
A novel hardware/software partitioning for SIMD-based real-time AVS video decoder. Multim. Tools Appl. 71(3): 1651-1671 (2014) - 2012
- [c12]Liwei Chen, Ming Cong, Jing Huang, Ling Li, Hongwei Liu, Cheng Qian:
A Novel HW/SW Partitioning with SIMD Instructions for AVS Video Decoder. NAS 2012: 273-277 - 2011
- [c11]Xiaohui Zhang, Ming Cong, Guangqiang Chen:
Software and Hardware Co-designed Multi-level TLBs for Chip Multiprocessors. CIT 2011: 609-614 - [c10]Xiaohui Zhang, Yifei Jiang, Ming Cong:
Performance Improvement for Multicore Processors Using Variable Page Technologies. NAS 2011: 230-235 - 2010
- [c9]Yongqing Ren, Hong An, Tao Sun, Ming Cong, Yaobin Wang:
Dynamic Resource Tuning for Flexible Core Chip Multiprocessors. ICA3PP (2) 2010: 32-41 - [c8]Ming Cong, Hong An, Lu Cao
Pattern-Unit Based Regular Expression Matching with Reconfigurable Function Unit. ICCSA (4) 2010: 427-440 - [c7]Liang Yang, Bao-Xia Fan, Ming Cong, Ji-Ye Zhao:
Register relocation to optimize clock network for multi-domain clock skew scheduling. ISCAS 2010: 3180-3183
2000 – 2009
- 2009
- [c6]Yongqing Ren, Hong An, Ming Cong, Guang Xu, Li Wang:
Scaling the Performance of Tiled Processor Architectures with On-Chip-Network Topology. CSO (1) 2009: 77-81 - 2008
- [c5]Rui Guo, Hong An, Ruiling Dou, Ming Cong, Yaobin Wang, Qi Li:
LogSPoTM: a scalable thread level speculation model based on transactional memory. ACSAC 2008: 1-8 - [c4]Guang Xu, Hong An, Ming Cong, Fang Wang, Yongqing Ren:
A wire delay scalable stream processor architecture. ACSAC 2008: 1-8 - 2007
- [c3]Yaobin Wang, Hong An, Bo Liang, Li Wang, Ming Cong, Yongqing Ren:
Balancing Thread Partition for Efficiently Exploiting Speculative Thread-Level Parallelism. APPT 2007: 40-49 - [c2]Ming Cong, Bo Fang:
Multisensor fusion and navigation for robot mower. ROBIO 2007: 417-422 - 2005
- [c1]Ming Cong, Yumin Zhou, Ying Jiang, Renke Kang, Dongming Guo:
An automated wafer-handling system based on the integrated circuit equipments. ROBIO 2005: 240-245
Coauthor Index
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