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Stephen Nease
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2010 – 2019
- 2016
- [j6]Frank L. Maldonado Huayaney, Stephen Nease, Elisabetta Chicca
:
Learning in Silicon Beyond STDP: A Neuromorphic Implementation of Multi-Factor Synaptic Plasticity With Calcium-Based Dynamics. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(12): 2189-2199 (2016) - [j5]Suma George, Sihwan Kim, Sahil Shah, Jennifer Hasler, Michelle Collins, Farhan Adil, Richard B. Wunderlich, Stephen Nease, Shubha Ramakrishnan:
A Programmable and Configurable Mixed-Mode FPAA SoC. IEEE Trans. Very Large Scale Integr. Syst. 24(6): 2253-2261 (2016) - [c7]Jennifer Hasler, Sihwan Kim, Sahil Shah, Farhan Adil, Michelle Collins, Scott Koziol, Stephen Nease:
Transforming mixed-signal circuits class through SoC FPAA IC, PCB, and toolset. EWME 2016: 1-6 - [c6]Sihwan Kim, Farhan Adil, Scott Koziol, Stephen Nease, Michelle Collins, Sahil Shah, Matt Kagle, Jennifer Hasler:
SoC FPAA IC, PCB, and tool demonstration. ISCAS 2016: 1440 - [c5]Stephen Nease, Elisabetta Chicca
Floating-gate-based intrinsic plasticity with low-voltage rate control. ISCAS 2016: 2507-2510 - 2015
- [b1]Stephen Nease:
Neural and analog computation on reconfigurable mixed-signal platforms. Georgia Institute of Technology, Atlanta, GA, USA, 2015 - [c4]Ole Richter
Device mismatch in a neuromorphic system implements random features for regression. BioCAS 2015: 1-4 - [c3]Stephen Nease, Elisabetta Chicca
Power-efficient estimation of silicon neuron firing rates with floating-gate transistors. ECCTD 2015: 1-4 - 2013
- [j4]Stephen Brink, Stephen Nease, Paul E. Hasler:
Computing with networks of spiking neurons on a biophysically motivated floating-gate based neuromorphic integrated circuit. Neural Networks 45: 39-49 (2013) - [j3]Stephen Brink, Stephen Nease, Paul E. Hasler, Shubha Ramakrishnan, Richard B. Wunderlich, Arindam Basu
A Learning-Enabled Neuron Array IC Based Upon Transistor Channel Models of Biological Phenomena. IEEE Trans. Biomed. Circuits Syst. 7(1): 71-81 (2013) - [c2]Stephen Nease, Stephen Brink, Paul E. Hasler:
STDP-enabled learning on a reconfigurable neuromorphic platform. ECCTD 2013: 1-4 - 2012
- [j2]Craig Schlottmann, Samuel A. Shapero, Stephen Nease, Paul E. Hasler:
A Digitally Enhanced Dynamically Reconfigurable Analog Platform for Low-Power Signal Processing. IEEE J. Solid State Circuits 47(9): 2174-2184 (2012) - [j1]Stephen Nease, Suma George, Paul E. Hasler, Scott Koziol, Stephen Brink:
Modeling and Implementation of Voltage-Mode CMOS Dendrites on a Reconfigurable Analog Platform. IEEE Trans. Biomed. Circuits Syst. 6(1): 76-84 (2012) - [c1]Craig Schlottmann, Stephen Nease, Samuel A. Shapero, Paul E. Hasler:
A mixed-mode FPAA SoC for analog-enhanced signal processing. CICC 2012: 1-4
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