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Fran Cardells
Person information
- affiliation: Hewlett-Packard R&D Lab, Barcelona, Spain
- affiliation: Autonomous University of Madrid, Spain
- affiliation: Polytechnic University of Valencia, Department of Electronic Engineering, Spain
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2000 – 2009
- 2006
- [j3]Francisco Cardells-Tormo
, Pep-Lluis Molinet:
Area-efficient 2-D shift-variant convolvers for FPGA-based digital image processing. IEEE Trans. Circuits Syst. II Express Briefs 53-II(2): 105-109 (2006) - [j2]Francisco Cardells-Tormo
Flexible hardware-friendly digital architecture for 2-D separable convolution-based scaling. IEEE Trans. Circuits Syst. II Express Briefs 53-II(7): 522-526 (2006) - 2005
- [c10]Marc Bautista-Palacios, Luis Baldez, Jordi Sempere-Agulló, Atilà Herms-Berenguer, Francisco Cardells-Tormo
Configurable Hardware/Software Architecture for Data Acquisition: Implementation on FPGA. FPL 2005: 241-246 - [c9]Francisco Cardells-Tormo
Area-Efficient 2-D Shift-Variant Convolvers for FPGA-based Digital Image Processing. FPL 2005: 578-581 - 2004
- [c8]Elias Todorovich, Eduardo I. Boemo, Francisco Cardells-Tormo, Javier Valls:
Power analysis and estimation tool integrated with XPOWER. FPGA 2004: 259 - [c7]Eduardo Picatoste-Olloqui
Implementing High-Speed Double-Data Rate (DDR) SDRAM Controllers on FPGA. FPL 2004: 279-288 - 2003
- [j1]Francisco Cardells-Tormo
Area-optimized implementation of quadrature direct digital frequency synthesizers on LUT-based FPGAs. IEEE Trans. Circuits Syst. II Express Briefs 50(3): 135-138 (2003) - [c6]Francisco Cardells-Tormo, Javier Valls-Coquillat, Vicenc Almenar-Terre:
Symbol Timing Synchronization in FPGA-Based Software Radios: Application to DVB-S. FPL 2003: 31-40 - [c5]José Marín-Roig, Vicente Torres-Carot, Ma José Canet, Asuncion Perez-Pascual, Trinidad Sansaloni, Francisco Cardells-Tormo, Fabian Angarita, Felip Vicedo, Vicenc Almenar-Terre, Javier Valls-Coquillat:
DIGIMOD: A Tool to Implement FPGA-Based Digital IF and Baseband Modems. FPL 2003: 988-991 - [c4]Francisco Cardells-Tormo
Quadrature direct digital frequency synthesizers: area-optimized design map for LUT-based FPGAs. ISCAS (2) 2003: 260-263 - 2002
- [c3]Francisco Cardells-Tormo, Javier Valls-Coquillat, Vicenc Almenar-Terre, Vicente Torres-Carot:
Efficient FPGA-based QPSK Demodulation Loops: Application to the DVB Standard. FPL 2002: 102-111 - [c2]Francisco Cardells-Tormo, Javier Valls-Coquillat:
High Performance Quadrature Digital Mixers for FPGAs. FPL 2002: 905-914 - [c1]Francisco Cardells-Tormo
Optimized FPGA-implementation of quadrature DDS. ISCAS (5) 2002: 369-372
Coauthor Index
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