default search action
21st ISQED 2020: Santa Clara, California, USA
- 21st International Symposium on Quality Electronic Design, ISQED 2020, Santa Clara, CA, USA, March 25-26, 2020. IEEE 2020, ISBN 978-1-7281-4207-4
- Qian Wang, Omid Aramoon, Pengfei Qiu, Gang Qu:
Efficient Transfer Learning on Modeling Physical Unclonable Functions. 1-6 - Seetal Potluri, Aydin Aysu, Akash Kumar:
SeqL: Secure Scan-Locking for IP Protection. 7-13 - Chen Dong, Lingqing Liu, Huangda Liu, Wenzhong Guo, Xing Huang, Sihuang Lian, Ximeng Liu, Tsung-Yi Ho
:
A Survey of DMFBs Security: State-of-the-Art Attack and Defense. 14-20 - Aijiao Cui, Yuxi Wang:
How to Retrieve PUF Response from a Fabricated Chip Securely? 21-26 - Farnaz Behnia, Ali Mirzaeian, Mohammad Sabokrou, Sai Manoj P. D., Tinoosh Mohsenin, Khaled N. Khasawneh, Liang Zhao, Houman Homayoun, Avesta Sasan:
Code-Bridged Classifier (CBC): A Low or Negative Overhead Defense for Making a CNN Classifier Robust Against Adversarial Attacks. 27-32 - Yuntao Liu, Ankit Mondal, Abhishek Chakraborty, Michael Zuzak, Nina Jacobsen, Daniel Xing, Ankur Srivastava
A Survey on Neural Trojans. 33-39 - Ashkan Vakil, Farnaz Behnia, Ali Mirzaeian, Houman Homayoun, Naghmeh Karimi, Avesta Sasan:
LASCA: Learning Assisted Side Channel Delay Analysis for Hardware Trojan Detection. 40-45 - Xiaolin Xu, Jiliang Zhang:
Rethinking FPGA Security in the New Era of Artificial Intelligence. 46-51 - Han Xu, Ziru Li, Fei Qiao, Qi Wei, Xinjun Liu, Huazhong Yang:
CDS-RSRAM: a Reconfigurable SRAM Architecture to Reduce Read Power with Column Data Segmentation. 52-59 - Shujuan Yin, Zheyu Liu, Guihong Li, Fei Qiao, Qi Wei, Yuanfeng Wu
RARA: Dataflow Based Error Compensation Methods with Runtime Accuracy-Reconfigurable Adder. 60-66 - Hassan Afzali-Kusha, Mehdi Kamal, Massoud Pedram:
Low-power Accuracy-configurable Carry Look-ahead Adder Based on Voltage Overscaling Technique. 67-72 - Francis G. Wolff, Daniel J. Weyer, Christos A. Papachristou
Design Space Exploration Driven by Lifetime Concerns due to Electromigration. 73-80 - Sumitha George, Nicholas Jao, Akshay Krishna Ramanathan, Xueqing Li, Sumeet Kumar Gupta, John Sampson, Vijaykrishnan Narayanan
Integrated CAM-RAM Functionality using Ferroelectric FETs. 81-86 - Sonal Shreya
Statistical Analysis of Temperature Variability on the Write Efficiency of Spin-Orbit Torque MRAM using Polynomial Chaos Metamodels. 87-92 - Mohammad Nasim Imtiaz Khan, Swaroop Ghosh:
Multi-Bit Read and Write Methodologies for Diode-MTJ Crossbar Array. 93-98 - Navid Khoshavi, Connor Broyles, Yu Bi:
Compression or Corruption? A Study on the Effects of Transient Faults on BNN Inference Accelerators. 99-104 - Hasib-Al Rashid, Nitheesh Kumar Manjunath
A Low-Power LSTM Processor for Multi-Channel Brain EEG Artifact Detection. 105-110 - Iram Tariq Bhatti, Osman Hasan
Formal Verification of a Fully Automated Out-of-Plane Cell Injection System. 111-116 - Yu-Guang Chen, Yu-Yi Lin, Ing-Chao Lin:
An NBTI-aware Task Parallelism Scheme for Improving Lifespan of Multi-core Systems. 117-122 - Akihiro Goda, Yukio Miyasaka, Amir Masoud Gharehbaghi, Masahiro Fujita:
Synthesis and Generalization of Parallel Algorithms Considering Communication Constraints. 123-128 - Ajoy Mandal, Saili Shete:
Optimal Choice of Waveform for Library Characterization for Accurate Delay Calculation. 129-133 - Ankit Mondal, Ankur Srivastava
Spintronics-based Reconfigurable Ising Model Architecture. 134-140 - Elham Azari, Ankit Wagle, Sunil P. Khatri, Sarma B. K. Vrudhula:
A Statistical Methodology for Post-Fabrication Weight Tuning in a Binary Perceptron. 141-148 - Sheikh Ariful Islam
Analytical Estimation and Localization of Hardware Trojan Vulnerability in RTL Designs. 149-154 - Rakibul Hassan, Gaurav Kolhe, Setareh Rafatirad, Houman Homayoun, Sai Manoj Pudukotai Dinakarrao
SATConda: SAT to SAT-Hard Clause Translator. 155-160 - Abhijitt Dhavlle, Raj Mehta, Setareh Rafatirad, Houman Homayoun, Sai Manoj Pudukotai Dinakarrao
Entropy-Shield: Side-Channel Entropy Maximization for Timing-based Side-Channel Attacks. 161-166 - Hengying Shan, Nathan J. Conrad, Shabnam Ghotbi, John Peterson, Saeed Mohammadi:
Integrated Implantable Electrode Array and Amplifier Design for Single-chip Wireless Neural Recordings. 167-172 - Teng-Chia Wang, Yan-Ping Chang, Chun-Jui Chen, Yun-Ju Lee, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang:
IMU-based Smart Knee Pad for Walking Distance and Stride Count Measurement. 173-178 - G. Anand Kumar:
Secure, Scalable and Low-Power Junction Temperature Sensing for Multi-Processor Systems-on-Chip. 179-182 - Prawar Poudel, Aleksandar Milenkovic
Saving Time and Energy Using Partial Flash Memory Operations in Low-Power Microcontrollers. 183-189 - Joseph Riad, Jianhao Chen, Edgar Sánchez-Sinencio, Peng Li:
Variation-Aware Heterogeneous Voltage Regulation for Multi-Core Systems-on-a-Chip with On-Chip Machine Learning. 190-194 - Motoi Ichihashi, Jia Zeng, Youngtag Woo, Xuelian Zhu, Chenchen Wang, James Mazza:
Performance Boost Scheme with Activated Dummy Fin in 12-nm FinFET Technology for High-Performance Logic Application. 196 - Mohammad Nasim Imtiaz Khan, Chak Yuen Cheng, Sung-Hao Lin, Abdullah Ash-Saki
A Morphable Physically Unclonable Function and True Random Number Generator using a Commercial Magnetic Memory. 197 - David Thompson, Haibo Wang:
Extracting Power Signature from Low Dropout Voltage Regulator for IoT Security. 198 - Yuntao Liu, Michael Zuzak, Yang Xie, Abhishek Chakraborty, Ankur Srivastava
Strong Anti-SAT: Secure and Effective Logic Locking. 199-205 - Mahmoud A. Elmohr, Haohao Liao, Catherine H. Gebotys:
EM Fault Injection on ARM and RISC-V. 206-212 - Rajit Karmakar, Santanu Chattopadhyay:
On Securing Scan Obfuscation Strategies Against ScanSAT Attack. 213-218 - Ahish Shylendra, Priyesh Shukla
Fault Attack Detection in AES by Monitoring Power Side-Channel Statistics. 219-224 - Dimitrios Garyfallou
Accurate Estimation of Dynamic Timing Slacks using Event-Driven Simulation. 225-230 - Christos Georgakidis, Georgios Ioannis Paliaroutis, Nikolaos Sketopoulos, Pelopidas Tsoumanis, Christos P. Sotiriou, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
A Layout-Based Soft Error Rate Estimation and Mitigation in the Presence of Multiple Transient Faults in Combinational Logic. 231-236 - Tengtao Li, Sachin S. Sapatnekar:
Stress-Induced Performance Shifts in Flexible System-in-Foils Using Ultra-Thin Chips. 237-242 - Edward Wang, Colin Schmidt, Adam M. Izraelevitz, John Charles Wright, Borivoje Nikolic
A Methodology for Reusable Physical Design. 243-249 - David C. C. Freitas, David F. M. Mota, Daniel Simões, Clailton Lopes, Roger C. Goerl, César Augusto Missio Marcon
Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-bit Memories used on Space Missions. 250-254 - Yuanwen Huang, Prabhat Mishra
Vulnerability-aware Dynamic Reconfiguration of Partially Protected Caches. 255-260 - Xianwei Cheng, Hui Zhao, Mahmut T. Kandemir, Saraju P. Mohanty, Beilei Jiang
Alleviating Bottlenecks for DNN Execution on GPUs via Opportunistic Computing. 261-267 - Ryan Gary Kim:
Learning-Enabled NoC Design for Heterogeneous Manycore Systems. 268-272 - Abdullah Ash-Saki
Improving Reliability of Quantum True Random Number Generator using Machine Learning. 273-279 - Kaship Sheikh, Lan Wei:
Reducing Impact of CNFET Process Imperfections on Shape of Activation Function by Using Connection Pruning and Approximate Neuron Circuit. 279-284 - Chun-Jui Chen, Yi-Ting Lin, Chia-Chun Lin, Yung-Chih Chen, Yun-Ju Lee, Chun-Yao Wang:
Rehabilitation System for Limbs using IMUs. 285-291 - Siyu Yang, Gabriel A. Rincón-Mora:
Piezoelectric CMOS Charger: Highest Output-Power Design. 292-297 - Nan Xing, Gabriel A. Rincón-Mora:
Highest Wireless Power: Inductively Coupled Or RF? 298-301 - Dileep Kurian, Tanay Karnik, Saksham Soni, Saransh Chhabra, Suhwan Kim, Jaykant Timbadiya, Ankit Gupta, Krishnan Ravichandran, Mukesh Bhartiya, Angela Nicoara:
Self-Powered IOT System for Edge Inference. 302-305 - Yixing Li, Fengbo Ren:
BNN Pruning: Pruning Binary Neural Network Guided by Weight Flipping Frequency. 306-311 - Hirenkumar Paneliya, Morteza Hosseini, Avesta Sasan, Houman Homayoun, Tinoosh Mohsenin:
CSCMAC - Cyclic Sparsely Connected Neural Network Manycore Accelerator. 311-316 - Sumin Jot, Abdullah M. Zyarah, Santosh Kurinec, Kai Ni, Fatima Tuz Zohora
FeFET-Based Neuromorphic Architecture with On-Device Feedback Alignment Training. 317-322 - Shanglin Zhou, Bingbing Li, Caiwu Ding, Lu Lu, Caiwen Ding:
An Efficient Deep Reinforcement Learning Framework for UAVs. 323-328 - Thomas Hubregtsen, Christoph Segler, Josef Pichlmeier, Aritra Sarkar
Integration and Evaluation of Quantum Accelerators for Data-Driven User Functions. 329-334 - Junde Li, Mahabubul Alam, Abdullah Ash-Saki
Hierarchical Improvement of Quantum Approximate Optimization Algorithm for Object Detection: (Invited Paper). 335-340 - Mohammad Saeed Abrishami, Amir Erfan Eshratifar, David Eigen, Yanzhi Wang, Shahin Nazarian, Massoud Pedram:
Efficient Training of Deep Convolutional Neural Networks by Augmentation in Embedding Space. 347-351 - Omid Aramoon, Gang Qu:
Impacts of Machine Learning on Counterfeit IC Detection and Avoidance Techniques. 352-357 - Jeeson Kim
TS-EFA: Resource-efficient High-precision Approximation of Exponential Functions Based on Template-scaling Method. 358-363 - Shiya Liu, Yibin Liang, Victor M. Gan, Lingjia Liu, Yang Yi:
Accurate and Efficient Quantized Reservoir Computing System. 364-369 - Yu Wang, Jeong-Jun Lee, Yu Ding, Peng Li:
A Scalable FPGA Engine for Parallel Acceleration of Singular Value Decomposition. 370-376 - Qiyuan An, Kangjun Bai
Deep Neural Network Based Speech Recognition Systems Under Noise Perturbations. 377-382 - Dina Medhat, Mohamed Dessouky, DiaaEldin Khalil:
Electrostatic Discharge Physical Verification of 2.5D/3D Integrated Circuits. 383-388 - Yuting Cao, Parijat Mukherjee, Mahesh Ketkar, Jin Yang, Hao Zheng:
Mining Message Flows using Recurrent Neural Networks for System-on-Chip Designs. 389-394 - Shivendra Singh, Varshita Gupta, Anuj Grover
Diagnostic Circuit for Latent Fault Detection in SRAM Row Decoder. 395-400 - Suprajaa Tummala, Xiaobang Liu, Ranga Vemuri
Signal Selection Heuristics for Post-Silicon Validation. 401-407 - Jinbo Chen, Keren Liu, Xiaochen Guo, Patrick Girard, Yuanqing Cheng:
DOVA: A Dynamic Overwriting Voltage Adjustment for STT-RAM L1 Cache. 408-414 - Archisman Ghosh, K. Gaurav Kumar, Debaprasad De, Arnab Raha, Mrinal Kanti Naskar:
Energy-Efficient Edge Detection using Approximate Ramanujan Sums. 414-420 - Moeez Akmal, Muhammad Sarmad Saeed, Muhammad Usama Sardar, Hareem Shafi, Osman Hasan
Comparative Framework for the Analysis of Thermal and Resource Management Algorithms for Multi-Core Architectures. 421-425 - Amirhossein Esmaili, Massoud Pedram:
Energy-aware Scheduling of Jobs in Heterogeneous Cluster Systems Using Deep Reinforcement Learning. 426-431 - Mineo Kaneko:
Two-Graph Approach to Temperature Dependent Skew Scheduling. 432-437 - Marzieh Vaeztourshizi, Mehdi Kamal, Massoud Pedram:
EGAN: A Framework for Exploring the Accuracy vs. Energy Efficiency Trade-off in Hardware Implementation of Error Resilient Applications. 438-443 - Ahmedullah Aziz
Insulator-Metal Transition Material Based Artificial Neurons: A Design Perspective. 444-451 - Mohammad Saeed Abrishami, Hao Ge, Justin F. Calderon, Massoud Pedram, Shahin Nazarian:
NN-PARS: A Parallelized Neural Network Based Circuit Simulation Framework. 452-456 - Zhixing Li, Weiping Shi:
Layout Capacitance Extraction Using Automatic Pre-Characterization and Machine Learning. 457-464
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-12-23 19:16 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: