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6th ASYNC 2000: Eilat, Israel
- 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2-6 April 2000, Eilat, Israel. IEEE Computer Society 2000, ISBN 0-7695-0586-4
Theory & Verification Techniques
- Marco A. Peña, Jordi Cortadella
, Enric Pastor
Formal Verification of Safety Properties in Timed Circuits. 2-11 - Willem C. Mallon:
On Directed Transformations of Delay-Insensitive Specifications, Alternations and Dynamic Nondeterminism. 12-22 - Igor Benko, Jo C. Ebergen:
Composing Snippets. 23-
Asynchronous Design in Embedded Systems
- Joep L. W. Kessels, Gerrit den Besten, Ad M. G. Peeters, Torsten Kramer, Volker Timm:
Applying Asynchronous Circuits in Contactless Smart Cards. 36-44 - George S. Taylor, Simon W. Moore
An On-Chip Dynamically Recalibrated Delay Line for Embedded Self-Timed Systems. 45-51 - Jens Muttersbach, Thomas Villiger, Wolfgang Fichtner:
Practical Design of Globally-Asynchronous Locally-Synchronous Systems. 52-
Testability
- Marly Roncken, Ken S. Stevens, Rajesh Pendurkar, Shai Rotem, Parimal Pal Chaudhuri:
CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder. 62-72 - Philip P. Shirvani, Subhasish Mitra, Jo C. Ebergen, Marly Roncken:
DUDES: A Fault Abstraction and Collapsing Framework for Asynchronous Circuits. 73-
Synthesis
- Ivan Blunno, Luciano Lavagno:
Automated Synthesis of Micro-Pipelines from Behavioral Verilog HDL. 84-92 - Hans M. Jacobson, Erik Brunvand, Ganesh Gopalakrishnan, Prabhakar Kudva:
High-Level Asynchronous System Design Using the ACK Framework. 93-103 - Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee:
Automatic Process-Oriented Control Circuit Generation for Asynchronous High-Level Synthesis. 104-113 - Michiel M. Ligthart, Karl Fant, Ross Smith, Alexander Taubin, Alex Kondratyev:
Asynchronous Design Using Commercial HDL Synthesis Tools. 114-
Arbitration & Circuit Techniques
- Alexandre V. Bystrov
Priority Arbiters. 128-137 - Charles E. Molnar, Ian W. Jones:
Simple Circuits that Work for Complicated Reasons. 138-149 - Fei Xia, Alexandre Yakovlev
Asynchronous Communication Mechanisms Using Self-Timed Circuits. 150-
Processor Design
- Jim D. Garside, W. J. Bainbridge, Andrew Bardsley, David M. Clark, David A. Edwards, Stephen B. Furber, David W. Lloyd, Siamak Mohammadi
AMULET3i - An Asynchronous System-on-Chip. 162-175 - Mike J. G. Lewis, L. E. M. Brackenbury:
An Instruction Buffer for a Low-Power DSP. 176-
Pushing the Performance Limit
- Oliver Hauck, A. Katoch, Sorin A. Huss:
VLSI System Design Using Asynchronous Wave Pipelines: A 0.35?m CMOS 1.5 GHz Elliptic Curve Public Key Cryptosystem Chip. 188- - Montek Singh, Steven M. Nowick:
High-Throughput Asynchronous Pipelines for Fine-Grain Dynamic Datapaths. 198- - Tiberiu Chelcea, Steven M. Nowick:
Low-Latency Asynchronous FIFO's Using Token Rings. 210-
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