default search action

combined dblp search
author search
venue search
publication search

ask others

"Reliable 3-D Clock-Tree Synthesis Considering Nonlinear Capacitive TSV ..."

Sai Manoj Pudukotai Dinakarrao et al. (2013)

> Home

Details and statistics

DOI: 10.1109/TCAD.2013.2270285

access: closed

type: Journal Article

metadata version: 2022-10-02

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcad/DinakarraoYSTL13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcad/DinakarraoYSTL13
Sai Manoj Pudukotai Dinakarrao, Hao Yu, Yang Shang, Chuan Seng Tan, Sung Kyu Lim:
Reliable 3-D Clock-Tree Synthesis Considering Nonlinear Capacitive TSV Model With Electrical-Thermal-Mechanical Coupling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(11): 1734-1747 (2013)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.