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"Design Techniques for a 6.4-32-Gb/s 0.96-pJ/b Continuous-Rate CDR With ..."

Kwanseo Park et al. (2022)

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DOI: 10.1109/JSSC.2021.3116485

access: closed

type: Journal Article

metadata version: 2022-02-08

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Kwanseo Park, Minkyo Shim, Han-Gon Ko, Borivoje Nikolic, Deog-Kyoon Jeong:
Design Techniques for a 6.4-32-Gb/s 0.96-pJ/b Continuous-Rate CDR With Stochastic Frequency-Phase Detector. IEEE J. Solid State Circuits 57(2): 573-585 (2022)

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