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"Security Path: An Emerging Design Methodology to Protect the FPGA IPs ..."

Sharareh Zamanzadeh, Ali Jahanian (2016)

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DOI: 10.1007/S10836-016-5593-1

access: closed

type: Journal Article

metadata version: 2020-09-11

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  - https://dblp.org/rec/journals/et/ZamanzadehJ16
Sharareh Zamanzadeh, Ali Jahanian:
Security Path: An Emerging Design Methodology to Protect the FPGA IPs Against Passive/Active Design Tampering. J. Electron. Test. 32(3): 329-343 (2016)

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