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Eladio Gutiérrez
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2020 – today
- 2024
- [j28]Ivan Fernandez
, Christina Giannoula
MATSA: An MRAM-Based Energy-Efficient Accelerator for Time Series Analysis. IEEE Access 12: 36727-36742 (2024) - [j27]Ricardo Quislant
Exploring multiprocessor approaches to time series analysis. J. Parallel Distributed Comput. 188: 104855 (2024) - 2023
- [j26]Ricardo Quislant
Time series analysis acceleration with advanced vectorization extensions. J. Supercomput. 79(9): 10178-10207 (2023) - 2022
- [j25]Ivan Fernandez
TraTSA: A Transprecision Framework for Efficient Time Series Analysis. J. Comput. Sci. 63: 101784 (2022) - [j24]Manuel Pedrero
Speculative Barriers With Transactional Memory. IEEE Trans. Computers 71(1): 197-208 (2022) - [c27]Ivan Fernandez, Ricardo Quislant
Exploiting Near-Data Processing to Accelerate Time Series Analysis. ISVLSI 2022: 279-282 - [c26]Ricardo Quislant
Exploiting Vector Extennsions to Accelerate Time Series Analysis. PDP 2022: 55-62 - [i3]Ivan Fernandez, Ricardo Quislant
Exploiting Near-Data Processing to Accelerate Time Series Analysis. CoRR abs/2206.00938 (2022) - [i2]Ivan Fernandez, Aditya Manglik, Christina Giannoula, Ricardo Quislant
Accelerating Time Series Analysis via Processing using Non-Volatile Memories. CoRR abs/2211.04369 (2022) - 2021
- [j23]Ivar Rummelhoff
An Abstract Machine Approach to Preserving Digital Information. IEEE Access 9: 154914-154932 (2021) - 2020
- [c25]Ivan Fernandez, Ricardo Quislant
NATSA: A Near-Data Processing Accelerator for Time Series Analysis. ICCD 2020: 120-129 - [c24]Ivan Fernandez, Ricardo Quislant
Energy-Efficient Time Series Analysis Using Transprecision Computing. SBAC-PAD 2020: 83-90 - [i1]Ivan Fernandez, Ricardo Quislant, Christina Giannoula, Mohammed Alser, Juan Gómez-Luna, Eladio Gutiérrez, Oscar G. Plata, Onur Mutlu:
NATSA: A Near-Data Processing Accelerator for Time Series Analysis. CoRR abs/2010.02079 (2020)
2010 – 2019
- 2019
- [j22]Ricardo Quislant
Improving hardware transactional memory parallelization of computational geometry algorithms using privatizing transactions. J. Parallel Distributed Comput. 131: 103-119 (2019) - [j21]Ivan Fernandez
Accelerating time series motif discovery in the Intel Xeon Phi KNL processor. J. Supercomput. 75(11): 7053-7075 (2019) - 2018
- [j20]Ricardo Quislant
Privatizing transactions for Lee's algorithm in commercial hardware transactional memory. J. Supercomput. 74(4): 1676-1694 (2018) - [c23]Manuel Pedrero
TMbarrier: Speculative Barriers Using Hardware Transactional Memory. PDP 2018: 214-221 - 2017
- [j19]Ricardo Quislant
Enhancing scalability in best-effort hardware transactional memory systems. J. Parallel Distributed Comput. 104: 73-87 (2017) - [j18]Manuel Pedrero
ReduxSTM: Optimizing STM designs for Irregular Applications. J. Parallel Distributed Comput. 107: 114-133 (2017) - [j17]Ricardo Quislant
Leveraging irrevocability to deal with signature saturation in hardware transactional memory. J. Supercomput. 73(6): 2525-2557 (2017) - [j16]Ricardo Quislant
Lazy Irrevocability for Best-Effort Transactional Memory Systems. IEEE Trans. Parallel Distributed Syst. 28(7): 1919-1932 (2017) - 2016
- [j15]Manuel Pedrero
A comparative analysis of STM approaches to reduction operations in irregular applications. J. Comput. Sci. 17: 630-638 (2016) - [c22]Ricardo Quislant
Insights into the Fallback Path of Best-Effort Hardware Transactional Memory Systems. Euro-Par 2016: 251-263 - 2015
- [c21]Manuel Pedrero
Improving Transactional Memory Performance for Irregular Applications. ICCS 2015: 2714-2718 - [p1]Ricardo Quislant
Conflict Detection in Hardware Transactional Memory. Transactional Memory 2015: 127-149 - 2014
- [j14]Miguel A. Gonzalez-Mesa, Eladio Gutiérrez, Emilio L. Zapata, Oscar G. Plata:
Effective Transactional Memory Execution Management for Improved Concurrency. ACM Trans. Archit. Code Optim. 11(3): 24:1-24:27 (2014) - [c20]Ricardo Quislant
Improving Signature Behavior by Irrevocability in Transactional Memory Systems. SBAC-PAD 2014: 120-127 - [c19]Ricardo Quislant
Scalability Analysis of Signatures in Transactional Memory Systems. SBAC-PAD 2014: 128-135 - 2013
- [j13]Julián Ramos, María A. Trenas, Eladio Gutiérrez
E-assessment of Matlab assignments in Moodle: Application to an introductory programming course for engineers. Comput. Appl. Eng. Educ. 21(4): 728-736 (2013) - [j12]Ricardo Quislant
LS-Sig: Locality-Sensitive Signatures for Transactional Memory. IEEE Trans. Computers 62(2): 322-335 (2013) - [j11]Ricardo Quislant
Hardware Signature Designs to Deal with Asymmetry in Transactional Data Sets. IEEE Trans. Parallel Distributed Syst. 24(3): 506-519 (2013) - [c18]Miguel A. Gonzalez-Mesa, Ricardo Quislant
Exploring Irregular Reduction Support in Transactional Memory. ICA3PP (1) 2013: 257-266 - [c17]Miguel A. Gonzalez-Mesa, Eladio Gutiérrez
Parallelizing the Sparse Matrix Transposition: Reducing the Programmer Effort Using Transactional Memory. ICCS 2013: 501-510 - [c16]Eladio Gutiérrez
An Experience of e-Assessment in an Introductory Course on Computer Organization. ICCS 2013: 1436-1445 - [c15]Miguel A. Gonzalez-Mesa, Ricardo Quislant
Dealing with Reduction Operations Using Transactional Memory. SBAC-PAD 2013: 128-135 - 2011
- [j10]María A. Trenas, Julián Ramos, Eladio Gutiérrez
Use of a New Moodle Module for Improving the Teaching of a Basic Course on Computer Architecture. IEEE Trans. Educ. 54(2): 222-228 (2011) - [c14]Ricardo Quislant
Unified Locality-Sensitive Signatures for Transactional Memory. Euro-Par (1) 2011: 326-337 - [c13]Ricardo Quislant
Multiset signatures for transactional memory. ICS 2011: 43-52 - 2010
- [j9]Eladio Gutiérrez
A new Moodle module supporting automatic verification of VHDL-based assignments. Comput. Educ. 54(2): 562-577 (2010) - [j8]Eladio Gutiérrez
Quantum computer simulation using the CUDA programming model. Comput. Phys. Commun. 181(2): 283-300 (2010) - [c12]Ricardo Quislant
Interval Filter: A Locality-Aware Alternative to Bloom Filters for Hardware Membership Queries by Interval Classification. IDEAL 2010: 162-169
2000 – 2009
- 2009
- [c11]Ricardo Quislant
Improving Signatures by Locality Exploitation for Transactional Memory. PACT 2009: 303-312 - [c10]Eladio Gutiérrez
Experiences with Mapping Non-linear Memory Access Patterns into GPUs. ICCS (1) 2009: 924-933 - 2008
- [j7]Eladio Gutiérrez
An analytical model of locality-based parallel irregular reductions. Parallel Comput. 34(3): 133-157 (2008) - [c9]Eladio Gutiérrez
Parallel Quantum Computer Simulation on the CUDA Architecture. ICCS (1) 2008: 700-709 - [c8]Francisco Corbera
Development of a new MOODLE module for a basic course on computer architecture. ITiCSE 2008: 349 - [c7]Eladio Gutiérrez
Memory Locality Exploitation Strategies for FFT on the CUDA Architecture. VECPAR 2008: 430-443 - 2005
- [j6]Eladio Gutiérrez
Parallel techniques in irregular codes: cloth simulation as case of study. J. Parallel Distributed Comput. 65(4): 424-436 (2005) - [j5]Oscar G. Plata
On the parallelization of irregular and dynamic programs. Parallel Comput. 31(6): 544-562 (2005) - 2004
- [j4]Eladio Gutiérrez, Oscar G. Plata
Data partitioning-based parallel irregular reductions. Concurr. Comput. Pract. Exp. 16(2-3): 155-172 (2004) - [j3]Sergio Romero
Parallelization issues of a code for physically-based simulation of fabrics. Comput. Phys. Commun. 162(3): 188-202 (2004) - [c6]Rafael Asenjo
Optimization Techniques for Irregular and Pointer-Based Programs. PDP 2004: 2- - 2003
- [j2]Eladio Gutiérrez
Optimization techniques for parallel irregular reductions. J. Syst. Archit. 49(3): 63-74 (2003) - 2002
- [c5]Eladio Gutiérrez, Oscar G. Plata, Emilio L. Zapata:
On Improving the Performance of Data Partitioning Oriented Parallel Irregular Reductions. PDP 2002: 445- - 2001
- [c4]Eladio Gutiérrez, Oscar G. Plata
Balanced, Locality-Based Parallel Irregular Reductions. LCPC 2001: 162-176 - [c3]Eladio Gutiérrez, Oscar G. Plata, Emilio L. Zapata:
Improving parallel irregular reductions using partial array expansion. SC 2001: 38 - 2000
- [j1]Eladio Gutiérrez
Automatic parallelization of irregular applications. Parallel Comput. 26(13-14): 1709-1738 (2000) - [c2]Eladio Gutiérrez, Oscar G. Plata, Emilio L. Zapata:
A compiler method for the parallel execution of irregular reductions in scalable shared memory multiprocessors. ICS 2000: 78-87
1990 – 1999
- 1999
- [c1]Eladio Gutiérrez, Oscar G. Plata, Emilio L. Zapata:
On Automatic Parallelization of Irregular Reductions on Scalable Shared Memory Systems. Euro-Par 1999: 422-429
Coauthor Index
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last updated on 2024-08-05 20:21 CEST by the dblp team
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