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Walter Huang
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2020 – today
- 2021
- [c6]Jiayao Gao, Weitao Xu
, Salil S. Kanhere
A Novel Model-Based Security Scheme for LoRa Key Generation. IPSN 2021: 47-61 - 2020
- [j5]Weitao Xu
Measurement, Characterization, and Modeling of LoRa Technology in Multifloor Buildings. IEEE Internet Things J. 7(1): 298-310 (2020) - [c5]Weitao Xu
EMIoT: A LoRa-enabled Smart Building Solution Based on Emergency Lights. BuildSys 2020: 330-331 - [i2]Weitao Xu, Jin Zhang, Jun Young Kim, Walter Huang, Salil S. Kanhere, Sanjay K. Jha, Wen Hu, Prasant Misra:
A Novel Emergency Light Based Smart Building Solution: Design, Implementation and Use Cases. CoRR abs/2007.15906 (2020)
2010 – 2019
- 2019
- [j4]Weitao Xu
The Design, Implementation, and Deployment of a Smart Lighting System for Smart Buildings. IEEE Internet Things J. 6(4): 7266-7281 (2019) - [i1]Weitao Xu, Jun Young Kim, Walter Huang, Salil S. Kanhere, Sanjay Jha, Wen Hu:
Measurement, Characterization and Modeling of LoRa Technology in Multi-floor Buildings. CoRR abs/1909.03900 (2019) - 2011
- [j3]Walter Huang, David V. Anderson:
Modified Sliding-Block Distributed Arithmetic with Offset Binary Coding for Adaptive Filters. J. Signal Process. Syst. 63(1): 153-163 (2011)
2000 – 2009
- 2009
- [c4]Walter Huang, David V. Anderson:
Adaptive filters using modified sliding-block distributed arithmetic with offset binary coding. ICASSP 2009: 545-548 - 2008
- [j2]Erhan Özalevli, Walter Huang, Paul E. Hasler, David V. Anderson:
A Reconfigurable Mixed-Signal VLSI Implementation of Distributed Arithmetic Used for Finite-Impulse Response Filtering. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(2): 510-521 (2008) - 2007
- [c3]Erhan Ozalevli
VLSI Implementation of a Reconfigurable Mixed-Signal Finite Impulse Response Filter. ISCAS 2007: 2168-2171 - 2005
- [j1]Daniel J. Allred, Heejong Yoo, Venkatesh Krishnan, Walter Huang, David V. Anderson:
LMS adaptive filters using distributed arithmetic for high throughput. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(7): 1327-1337 (2005) - 2004
- [c2]Daniel J. Allred, Walter Huang, Venkatesh Krishnan, Heejong Yoo, David V. Anderson:
An FPGA Implementation for a High Throughput Adaptive Filter Using Distributed Arithmetic. FCCM 2004: 324-325 - [c1]Daniel J. Allred, Heejong Yoo, Venkatesh Krishnan, Walter Huang, David V. Anderson:
A novel high performance distributed arithmetic adaptive filter implementation on an FPGA. ICASSP (5) 2004: 161-164
Coauthor Index
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