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Steven F. Quigley
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Journal Articles
- 2013
- [j4]Lin Zhang
, Steven F. Quigley, Andrew H. C. Chan
A fast scalable implementation of the two-dimensional triangular Discrete Element Method on a GPU platform. Adv. Eng. Softw. 60: 70-80 (2013) - 2011
- [j3]Phaklen EhKan, Tim Allen, Steven F. Quigley:
FPGA Implementation for GMM-Based Speaker Identification. Int. J. Reconfigurable Comput. 2011: 420369:1-420369:8 (2011) - 2009
- [j2]Abdallatif S. Abu-Issa, Steven F. Quigley:
Bit-Swapping LFSR and Scan-Chain Ordering: A Novel Technique for Peak- and Average-Power Reduction in Scan-Based BIST. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(5): 755-759 (2009) - 2007
- [j1]Dawn Sasha Lynette Dolcy, Costas C. Constantinou
A Fokker-Planck equation method predicting Buffer occupancy in a single queue. Comput. Networks 51(8): 2198-2216 (2007)
Conference and Workshop Papers
- 2013
- [c19]Phaklen EhKan, Naufal Alee, R. Badlishah Ahmad, Steven F. Quigley, T. Allen:
Implementation of Log-Add Algorithm for GMM-Based Speaker Identification on FPGA. ICISA 2013: 1-4 - 2010
- [c18]Phak Len Eh Kan, Tim Allen, Steven F. Quigley:
A GMM-Based Speaker Identification System on FPGA. ARC 2010: 358-363 - [c17]Abdallatif S. Abu-Issa, Steven F. Quigley:
Multi-degree smoother for low power consumption in single and multiple scan-chains BIST. ISQED 2010: 689-696 - 2008
- [c16]Jing Hu, Steven F. Quigley, Andrew Chan
An element-by-element preconditioned Conjugate Gradient solver of 3D tetrahedral finite elements on an FPGA coprocessor. FPL 2008: 575-578 - 2003
- [c15]Stephen Charlwood, Steven F. Quigley:
The Impact of Routing Architecture on Reconfiguration Overheads. Engineering of Reconfigurable Systems and Algorithms 2003: 102-110 - [c14]Jonathan Mangnall, Steven F. Quigley:
System Level Simulation of a SIMD Active Memory Enhanced PC (Or, Why We Don't Want 100% Bandwidth Utilisation. IPDPS 2003: 281 - 2002
- [c13]Benjamin Carrión Schäfer
Analysis and Implementation of the Discrete Element Method Using a Dedicated Highly Parallel Architecture in Reconfigurable Computing. FCCM 2002: 173-181 - [c12]Stephen J. Melnikoff, Steven F. Quigley, Martin J. Russell:
Implementing a Simple Continuous Speech Recognition System on an FPGA. FCCM 2002: 275-276 - [c11]Stephen J. Melnikoff, Steven F. Quigley, Martin J. Russell:
Speech Recognition on an FPGA Using Discrete and Continuous Hidden Markov Models. FPL 2002: 202-211 - [c10]Stephen Charlwood, Jonathan Mangnall, Steven F. Quigley:
System-Level Modelling for Performance Estimation of Reconfigurable Coprocessors. FPL 2002: 567-576 - [c9]Benjamin Carrión Schäfer
Scalable Implementation of the Discrete Element Method on a Reconfigurable Computing Platform. FPL 2002: 925-934 - [c8]Stephen J. Melnikoff, Steven F. Quigley, Martin J. Russell:
Performing speech recognition on multiple parallel files using continuous hidden Markov models on an FPGA. FPT 2002: 399-402 - 2001
- [c7]Stephen J. Melnikoff, Steven F. Quigley, Martin J. Russell:
Implementing a Hidden Markov Model Speech Recognition System in Programmable Logic. FPL 2001: 81-90 - [c6]Benjamin Carrión Schäfer
Evaluation of an FPGA Implementation of the Discrete Element Method. FPL 2001: 306-314 - 2000
- [c5]Stephen J. Melnikoff, Philip James-Roxby, Steven F. Quigley, Martin J. Russell:
Reconfigurable Computing for Speech Recognition: Preliminary Findings. FPL 2000: 495-504 - 1999
- [c4]B. Foruzandeh, Steven F. Quigley:
An investigation of the effect of synapse transfer characteristic on the performance of analogue neural networks. ICECS 1999: 1017-1020 - [c3]B. Foruzandeh, Steven F. Quigley:
An analogue multilayer perceptron circuit with on-chip training. ISCAS (5) 1999: 395-398 - 1998
- [c2]N. L. Miller, Steven F. Quigley:
A Novel Field Programmable Gat Array Architecture for High Speed Arithmetic Processing. FPL 1998: 386-390 - 1994
- [c1]S. Pammu, Steven F. Quigley:
An Analogue CMOS Defuzzication Circuit with Representation of Triangular Membership Functions. ISCAS 1994: 495-498
Coauthor Index
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