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Shyue-Wen Yang
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2010 – 2019
- 2015
- [c6]Ming-Hwa Sheu, Shyue-Wen Yang, Tzu-Hsiung Chen:
Extendable multi-pixel object labeling for digital image. ICCE-TW 2015: 440-441 - 2012
- [c5]Shyue-Wen Yang, Ming-Hwa Sheu, Wen-Kai Tsai:
Fast image moving object segmentation based on block texture for embedded system implementation. ISPACS 2012: 649-652 - 2010
- [c4]Ming-Hwa Sheu, Shyue-Wen Yang, Wen-Sheng Huang, Siang-Min Siao:
FPGA implementation for image object detection system on NoCs. APCCAS 2010: 560-563
2000 – 2009
- 2009
- [c3]Shyue-Wen Yang, Ming-Hwa Sheu, Jun-Jie Lin, Chuang-Chun Hu, Tzu-Hsiung Chen, Shau-Yin Tseng:
Parallel 3-Pixel Labeling Method and its Hardware Architecture Design. IAS 2009: 185-188 - 2007
- [c2]Shyue-Wen Yang, Ming-Hwa Sheu, Chun-Kai Yeh, Chih-Yuen Wen, Chih-Chieh Lin, Wen-Kai Tsai:
Fast Fair Crossbar Scheduler for On-chip Router. ISCAS 2007: 385-388 - 2005
- [c1]Shyue-Wen Yang, Ming-Hwa Sheu, Hsien-Huang P. Wu, Hung-En Chien, Ping-Kuo Weng, Ying-Yih Wu:
VLSI architecture design for a fast parallel label assignment in binary image. ISCAS (3) 2005: 2393-2396 - 2004
- [j1]Ming-Hwa Sheu, Su-Hon Lin, Chichyang Chen, Shyue-Wen Yang:
An efficient VLSI design for a residue to binary converter for general balance moduli (2n-3, 2n+1, 2n-1, 2n+3). IEEE Trans. Circuits Syst. II Express Briefs 51-II(3): 152-155 (2004)
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