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Xiao Liu 0011
Person information
- affiliation: University of California, Berkeley, CA, USA
- affiliation (former): Chinese University of Hong Kong, Department of Computer Science and Engineering, Hong Kong
Other persons with the same name
- Xiao Liu — disambiguation page
- Xiao Liu 0001
— University College London, Department of Electronic and Electrical Engineering, UK
- Xiao Liu 0002
- Xiao Liu 0003
- Xiao Liu 0004
- Xiao Liu 0005
- Xiao Liu 0006
- Xiao Liu 0007
- Xiao Liu 0009 — University of Technology of Compiègne, France
- Xiao Liu 0010 — Virginia Tech, Blacksburg, VA, USA
- Xiao Liu 0012 — Zhejiang University, College of Computer Science, Hangzhou, China
- Xiao Liu 0013 — Beihang University, School of Electronic and Information Engineering, Beijing, China
- Xiao Liu 0014 — Xiamen University, China
- Xiao Liu 0015
- Xiao Liu 0016
- Xiao Liu 0017
- Xiao Liu 0018
- Xiao Liu 0019
- Xiao Liu 0020
- Xiao Liu 0021
- Xiao Liu 0022
- Xiao Liu 0023
- Xiao Liu 0024 — University of Maryland Baltimore County, Department of Computer Science and Electrical Engineering, Baltimore, MD, USA
- Xiao Liu 0025 — Pennsylvania State University, College of Information Sciences and Technology, University Park, PA, USA (and 1 more)
- Xiao Liu 0026
- Xiao Liu 0027
- Xiao Liu 0028
- Xiao Liu 0029
- Xiao Liu 0030 — University of Massachusetts Amherst, MA, USA (and 1 more)
- Xiao Liu 0031
- Xiao Liu 0032
- Xiao Liu 0033 — University of California San Diego, La Jolla, CA, USA
- Xiao Liu 0034 — University of California, Davis, CA, USA
- Xiao Liu 0035 — National University of Singapore, Department of Computer Science, Singapore
- Xiao Liu 0036
- Xiao Liu 0037
- Xiao Liu 0038
- Xiao Liu 0039
- Xiao Liu 0040
- Xiao Liu 0041
- Xiao Liu 0042 — Megvii Technology Inc., Face++, Beijing, China
- Xiao Liu 0043
- Xiao Liu 0044
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2010 – 2019
- 2014
- [b1]Xiao Liu, Qiang Xu:
Trace-Based Post-Silicon Validation for VLSI Circuits. Lecture Notes in Electrical Engineering 252, Springer 2014, ISBN 978-3-319-00532-4, pp. 1-102 - 2013
- [j4]Xiao Liu, Qiang Xu
On Multiplexed Signal Tracing for Post-Silicon Validation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(5): 748-759 (2013) - 2012
- [j3]Xiao Liu, Qiang Xu
On Signal Selection for Visibility Enhancement in Trace-Based Post-Silicon Validation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(8): 1263-1274 (2012) - [j2]Xiao Liu, Qiang Xu
On X-Variable Filling and Flipping for Capture-Power Reduction in Linear Decompressor-Based Test Compression Environment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(11): 1743-1753 (2012) - [c16]Feng Yuan, Xiao Liu, Qiang Xu
X-tracer: a reconfigurable X-tolerant trace compressor for silicon debug. DAC 2012: 555-560 - [c15]Xiao Liu, Qiang Xu
On efficient silicon debug with flexible trace interconnection fabric. ITC 2012: 1-9 - 2011
- [j1]Jia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, Qiang Xu
Capture-power-aware test data compression using selective encoding. Integr. 44(3): 205-216 (2011) - [c14]Xiao Liu, Qiang Xu:
On multiplexed signal tracing for post-silicon debug. DATE 2011: 685-690 - [c13]Feng Yuan, Xiao Liu, Qiang Xu
On High-Quality Test Pattern Selection and Manipulation. ETS 2011: 218 - [c12]Feng Yuan, Xiao Liu, Qiang Xu
Pseudo-functional testing for small delay defects considering power supply noise effects. ICCAD 2011: 34-39 - 2010
- [c11]Qiang Xu
On signal tracing in post-silicon validation. ASP-DAC 2010: 262-267 - [c10]Xiao Liu, Qiang Xu
On Signal Tracing for Debugging Speedpath-Related Electrical Errors in Post-Silicon Validation. Asian Test Symposium 2010: 243-248 - [c9]Xiao Liu, Yubin Zhang, Feng Yuan, Qiang Xu:
Layout-aware pseudo-functional testing for critical paths considering power supply noise effects. DATE 2010: 1432-1437
2000 – 2009
- 2009
- [c8]Xiao Liu, Qiang Xu
Interconnection fabric design for tracing signals in post-silicon validation. DAC 2009: 352-357 - [c7]Xiao Liu, Qiang Xu:
Trace signal selection for visibility enhancement in post-silicon validation. DATE 2009: 1338-1343 - [c6]Xiao Liu, Qiang Xu:
A generic framework for scan capture power reduction in fixed-length symbol-based test compression environment. DATE 2009: 1494-1499 - [c5]Xiao Liu, Qiang Xu
On simultaneous shift- and capture-power reduction in linear decompressor-based test compression environment. ITC 2009: 1-10 - [c4]Xiao Liu, Qiang Xu
Trace signal selection for debugging electrical errors in post-silicon validation. ITC 2009: 1 - 2008
- [c3]Xiao Liu, Qiang Xu
On Reusing Test Access Mechanisms for Debug Data Transfer in SoC Post-Silicon Validation. ATS 2008: 303-308 - [c2]Jia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, Qiang Xu
On capture power-aware test data compression for scan-based testing. ICCAD 2008: 67-72 - [c1]Xiao Liu, Feng Yuan, Qiang Xu
A Generic Framework for Scan Capture Power Reduction in Test Compression Environment. ITC 2008: 1
Coauthor Index
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