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Rafael Tornero
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2020 – today
- 2024
- [c20]Xabier Iturbe, Bernabé Linares-Barranco, Sio-Hoi Ieng, Arne Erdmann, Luca Peres, Oliver Rhodes, Rafael Tornero, Manolis Sifalakis, Marcel D. van de Burgwal, Amirreza Yousefzadeh, Maha Kooli, Riccardo Alidori, Pavel Zaykov:
Invited: Neuromorphic Vision Modalities in the NimbleAI 3D Chip. DAC 2024: 358:1-358:4 - 2023
- [c19]Xabier Iturbe, Nassim Abderrahmane, Jaume Abella
, Sergi Alcaide
NimbleAI: Towards Neuromorphic Sensing-Processing 3D-integrated Chips. DATE 2023: 1-6 - [c18]David Rodriguez, Rafael Tornero
Towards Efficient Neural Network Model Parallelism on Multi-FPGA Platforms. DATE 2023: 1-6 - [c17]Rafael Tornero, David Rodriguez, José Maria Martínez, José Flich:
An Open-Source FPGA Platform for Shared-Memory Heterogeneous Many-Core Architecture Exploration. DCIS 2023: 1-6 - 2021
- [j5]Ramon Canal
Predictive Reliability and Fault Management in Exascale Systems: State of the Art and Perspectives. ACM Comput. Surv. 53(5): 95:1-95:32 (2021) - [c16]José Flich
From a FPGA Prototyping Platform to a Computing Platform: The MANGO Experience. DATE 2021: 7-12 - [i1]Giovanni Agosta, William Fornaciari, David Atienza, Ramon Canal, Alessandro Cilardo, José Flich Cardo, Carles Hernández Luz, Michal Kulczewski, Giuseppe Massari, Rafael Tornero Gavilá, Marina Zapater:
The RECIPE Approach to Challenges in Deeply Heterogeneous High Performance Systems. CoRR abs/2103.03044 (2021) - 2020
- [j4]Giovanni Agosta, William Fornaciari
The RECIPE approach to challenges in deeply heterogeneous high performance systems. Microprocess. Microsystems 77: 103185 (2020)
2010 – 2019
- 2019
- [c15]Giovanni Agosta, William Fornaciari
Challenges in Deeply Heterogeneous High Performance Systems. DSD 2019: 428-435 - 2018
- [c14]William Fornaciari
Reliable power and time-constraints-aware predictive management of heterogeneous exascale systems. SAMOS 2018: 187-194 - 2017
- [c13]José Flich
MANGO: Exploring Manycore Architectures for Next-GeneratiOn HPC Systems. DSD 2017: 478-485 - [c12]José Flich
Deeply Heterogeneous Many-Accelerator Infrastructure for HPC Architecture Exploration. PARCO 2017: 381-389 - 2016
- [c11]José Flich, Giovanni Agosta, Philipp Ampletzer, David Atienza Alonso, Carlo Brandolese, Alessandro Cilardo, William Fornaciari, Ynse Hoornenborg, Mario Kovac, Bruno Maitre, Giuseppe Massari, Hrvoje Mlinaric, Ermis Papastefanakis, Fabrice Roudet, Rafael Tornero, Davide Zoni:
Enabling HPC for QoS-sensitive applications: The MANGO approach. DATE 2016: 702-707 - 2015
- [c10]Alessandro Cilardo, José Flich
Customizable Heterogeneous Acceleration for Tomorrow's High-Performance Computing. HPCC/CSS/ICESS 2015: 1181-1185 - 2013
- [c9]Javier Reyes, Juan M. Orduña
Acceleration of Communication-Aware Task Mapping Techniques through GPU Computing. AINA Workshops 2013: 843-848 - 2012
- [j3]Rafael Tornero, Maurizio Palesi, José Duato:
A Topology-Independent Mapping Technique for Application-Specific Networks-on-Chip. Comput. Informatics 31(5): 939-970 (2012) - [j2]Maurizio Palesi, Rafael Tornero, Juan Manuel Orduña, Vincenzo Catania, Daniela Panno:
Designing Robust Routing Algorithms and Mapping Cores in Networks-on-Chip: A Multi-objective Evolutionary-based Approach. J. Univers. Comput. Sci. 18(7): 937-969 (2012) - [c8]Rafael Tornero
A multi-agent system for obtaining dynamic origin/destination matrices on intelligent road networks. EATIS 2012: 157-164 - [c7]Paul Bogdan
An Optimal Control Approach to Power Management for Multi-Voltage and Frequency Islands Multiprocessor Platforms under Highly Variable Workloads. NOCS 2012: 35-42 - [c6]Rafael Tornero
Computing Real-Time Dynamic Origin/Destination Matrices from Vehicle-to-Infrastructure Messages Using a Multi-Agent System. PAAMS (Special Sessions) 2012: 147-154 - 2011
- [j1]Rafael Tornero
A Communication-Driven Routing Technique for Application-Specific NoCs. Int. J. Parallel Program. 39(3): 357-374 (2011) - 2010
- [c5]Rafael Tornero
Improving topological mapping on NoCs. IPDPS Workshops 2010: 1-4
2000 – 2009
- 2009
- [c4]Rafael Tornero
Distance Constrained Mapping to Support NoC Platforms Based on Source Routing. Euro-Par Workshops 2009: 16-25 - [c3]Rafael Tornero
A multi-objective strategy for concurrent mapping and routing in networks on chip. IPDPS 2009: 1-8 - 2008
- [c2]Rafael Tornero
CART: Communication-Aware Routing Technique for Application-Specific NoCs. DSD 2008: 26-31 - [c1]Rafael Tornero
A Communication-Aware Topological Mapping Technique for NoCs. Euro-Par 2008: 910-919
Coauthor Index
aka: José Flich Cardo
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