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Maneesha Gupta
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2020 – today
- 2025
- [j38]Annu Dabas, Shweta Kumari, Maneesha Gupta, Richa Yadav:
A novel architecture of high performance fully differential two stage RFC OTA designed using DFVF and hybrid cascode compensation techniques. Integr. 100: 102296 (2025) - 2024
- [j37]Arvin Kumar, Shweta Kumari, Maneesha Gupta
, Harish Parthasarathy:
A New Low-Voltage Second Generation Voltage Conveyor Using Merged Voltage Follower and DTMOS Techniques. J. Circuits Syst. Comput. 33(3) (2024) - [j36]Preeti Singh, Maneesha Gupta, Bhawna Aggarwal:
Low Power Wideband Folded Cascade Based Transimpedance Amplifier Using Flipped Voltage Follower and Floating Gate MOSFET. Wirel. Pers. Commun. 137(2): 893-907 (2024) - 2023
- [j35]Ritu Daryani
Design of Fractional-Order Chebyshev Low-Pass Filter for Optimized Magnitude Response Using Metaheuristic Evolutionary Algorithms. Circuits Syst. Signal Process. 42(5): 2507-2537 (2023) - [j34]Annu Dabas, Shweta Kumari, Maneesha Gupta
Design and analysis of DTMOS based RFC with controlled positive feedback OTA using HSCCM and adaptive biasing technique. Integr. 90: 90-103 (2023) - [j33]Suchandra Aich Bhowmick, Maneesha Gupta, Abhisek Chakraborty, Neeraj Agarwal
Generation of Non-Linear Technique Based 6 Hourly Wind Reanalysis Products Using SCATSAT-1 and Numerical Weather Prediction Model Outputs. Remote. Sens. 15(4): 1040 (2023) - [j32]Anshul Gupta
A Fractional-Order Meminductor Emulator Using OTA and CDBA with Application in Adaptive Learning Circuit. Wirel. Pers. Commun. 131(4): 2675-2696 (2023) - [c7]Om Krishna Gupta, Neeta Pandey, Maneesha Gupta
Refining RNMC compensation for Three Stage Amplifier using DTMOS Transistor and FFVF. ICCCNT 2023: 1-4 - 2022
- [j31]Mihika Mahendra, Shweta Kumari, Maneesha Gupta
Low voltage fully differential OTA using DTMOS based self cascode transistor with slew-rate enhancement and its filter application. Integr. 84: 47-61 (2022) - [j30]Preeti Singh
Wideband High Gain Active Feedback Transimpedance Amplifier. Wirel. Pers. Commun. 123(3): 2721-2736 (2022) - [j29]Ashu Soni, Maneesha Gupta
DVCC Based (2 + α) Order Low Pass Bessel Filter Using Optimization Techniques. Wirel. Pers. Commun. 125(3): 2965-2984 (2022) - [c6]Neil Saxena, Maneesha Gupta, Jahnavi T. Patel:
Algorithm to Estimate Scalloping & Banding in Scansar Images and Deep Learning Based Descalloping Technique. IGARSS 2022: 393-396 - 2021
- [j28]Ashu Soni, Maneesha Gupta
Analysis and Design of Optimized Fractional Order Low-Pass Bessel Filter. J. Circuits Syst. Comput. 30(2): 2150035:1-2150035:20 (2021) - [j27]Urvashi Bansal, Maneesha Gupta
Frequency-Compensated Bulk-Driven TIA Suitable for Low-Voltage Low-Power Applications. J. Circuits Syst. Comput. 30(7): 2150121:1-2150121:14 (2021) - [j26]Mihika Mahendra, Shweta Kumari, Maneesha Gupta
Low voltage high performance super class AB OTA design using SCCM and DTMOS with enhanced slew rate and DC gain. Microelectron. J. 113: 105101 (2021) - [j25]Shalabh K. Mishra
Approximation of Fractional-Order Butterworth Filter Using Pole-Placement in W-Plane. IEEE Trans. Circuits Syst. II Express Briefs 68(10): 3229-3233 (2021) - 2020
- [b1]Kirti Gupta, Neeta Pandey, Maneesha Gupta
Model and Design of Improved Current Mode Logic Gates - Differential and Single-ended. Springer 2020, ISBN 978-981-15-0981-0, pp. 1-171
2010 – 2019
- 2019
- [j24]Kunwar Singh, Satish Chandra Tiwari, Maneesha Gupta
A closed-loop ASIC design approach based on logical effort theory and artificial neural networks. Integr. 69: 10-22 (2019) - [c5]Maneesha Gupta, Vaibhav Malhotra, Bankim Shah, Shilpa Prakash, Anuja Sharma, B. Kartikeyan:
RISAT-1 SAR HRS Mode Data Quality Evaluation. IGARSS 2019: 1041-1044 - 2018
- [j23]Kunwar Singh, Aman Jain, Aviral Mittal, Vinay Yadav, Atul Anshuman Singh, Anmoll Kumar Jain, Maneesha Gupta
Optimum transistor sizing of CMOS logic circuits using logical effort theory and evolutionary algorithms. Integr. 60: 25-38 (2018) - [j22]Urvashi Bansal, Maneesha Gupta
High bandwidth transimpedance amplifier using FGMOS for low voltage operation. Integr. 60: 153-159 (2018) - [j21]Shweta Kumari, Maneesha Gupta
Design and Analysis of Tunable Voltage Differencing Inverting Buffered Amplifier (VDIBA) with Enhanced Performance and Its Application in Filters. Wirel. Pers. Commun. 100(3): 877-894 (2018) - [j20]Shireesh Kumar Rai
Comment: Multifunction Current Differencing Cascaded Transconductance Amplifier (MCDTA) and Its Application to Current-Mode Multiphase Sinusoidal Oscillator. Wirel. Pers. Commun. 100(4): 1295-1297 (2018) - 2017
- [j19]Richa Srivastava, Urvashi Singh, Maneesha Gupta
Low-voltage low-power high performance current mode fullwave rectifier. Microelectron. J. 61: 51-56 (2017) - [j18]Niharika Narang, Bhawna Aggarwal, Maneesha Gupta
DTMOS and FD-FVF based low voltage high performance Voltage Differencing Transconductance Amplifier (VDTA) and its application in MISO filter. Microelectron. J. 63: 66-74 (2017) - 2016
- [j17]Bhawna Aggarwal, Maneesha Gupta
A comparative study of various current mirror configurations: Topologies and characteristics. Microelectron. J. 53: 134-155 (2016) - [c4]Niharika Narang, Bhawna Aggarwal, Maneesha Gupta
DTMOS based low voltage high performance FVF-OTA and its application in MISO filter. ICACCI 2016: 2446-2452 - 2015
- [j16]Maneesha Gupta
Low-voltage low-power FGMOS based VDIBA and its application as universal filter. Microelectron. J. 46(2): 125-134 (2015) - [j15]Urvashi Singh, Maneesha Gupta
A new wideband regulated cascode amplifier with improved performance and its application. Microelectron. J. 46(8): 758-776 (2015) - 2014
- [j14]Maneesha Gupta
Wideband digital integrators and differentiators designed using particle swarm optimisation. IET Signal Process. 8(6): 668-679 (2014) - [j13]Madhu Jain, Maneesha Gupta
The Design of the IIR Differintegrator and its Application in Edge Detection. J. Inf. Process. Syst. 10(2): 223-239 (2014) - [j12]Neeta Pandey, Kirti Gupta
An efficient triple-tail cell based PFSCL D latch. Microelectron. J. 45(8): 1001-1007 (2014) - 2013
- [j11]Satish Chandra Tiwari, Kunwar Singh, Maneesha Gupta
Automated transistor width optimisation algorithms for digital circuits. Int. J. Embed. Syst. 5(1/2): 44-52 (2013) - [j10]Bhawna Aggarwal, Maneesha Gupta
Analysis of low voltage bulk-driven self-biased high swing cascode current mirror. Microelectron. J. 44(3): 225-235 (2013) - [j9]Kirti Gupta, Neeta Pandey, Maneesha Gupta
Analysis and design of MOS current mode logic exclusive-OR gate using triple-tail cells. Microelectron. J. 44(6): 561-567 (2013) - [j8]Urvashi Singh, Maneesha Gupta
High frequency flipped voltage follower with improved performance and its application. Microelectron. J. 44(12): 1175-1192 (2013) - [c3]Bhawna Aggarwal, Maneesha Gupta
A low voltage wide swing level shifted FVF based current mirror. ICACCI 2013: 880-885 - 2011
- [j7]Abhirup Lahiri, Maneesha Gupta
Realizations of Grounded Negative Capacitance Using CFOAs. Circuits Syst. Signal Process. 30(1): 143-155 (2011) - [j6]Maneesha Gupta
Digital fractional-order differentiator and integrator models based on first-order and higher order operators. Int. J. Circuit Theory Appl. 39(5): 461-474 (2011) - [j5]Maneesha Gupta
Recursive wideband digital integrator and differentiator. Int. J. Circuit Theory Appl. 39(7): 775-782 (2011) - [j4]Kirti Gupta, Ranjana Sridhar, Jaya Chaudhary, Neeta Pandey, Maneesha Gupta
New Low-Power Tristate Circuits in Positive Feedback Source-Coupled Logic. J. Electr. Comput. Eng. 2011: 670508:1-670508:6 (2011) - [j3]Maneesha Gupta
Low-voltage FGMOS based analog building blocks. Microelectron. J. 42(6): 903-912 (2011) - [j2]G. S. Visweswaran, Pragya Varshney, Maneesha Gupta
New Approach to Realize Fractional Power in z-Domain at Low Frequency. IEEE Trans. Circuits Syst. II Express Briefs 58-II(3): 179-183 (2011) - 2010
- [j1]Maneesha Gupta
FGMOS based voltage-controlled resistor and its applications. Microelectron. J. 41(1): 25-32 (2010)
2000 – 2009
- 2009
- [c2]Bhawna Aggarwal, Maneesha Gupta
Low-Voltage Cascode Current Mirror Based on Bulk-Driven MOSFET and FGMOS Techniques. ARTCom 2009: 473-477 - 2008
- [c1]Maneesha Gupta, Pragya Varshney, G. S. Visweswaran, B. Kumar:
Novel Digital Differentiator and Corresponding Fractional Order Differentiator Models. SIGMAP 2008: 47-54
Coauthor Index
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