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Tamer Ragheb
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2010 – 2019
- 2012
- [c18]Tamer Ragheb, Andrew Marshall:
Calibration of propagation delay of flip-flops. SoCC 2012: 376-380
2000 – 2009
- 2009
- [j3]Tamer Ragheb, Andrew J. Ricketts, Mosin Mondal, Sami Kirolos, Greg M. Link, Vijaykrishnan Narayanan, Yehia Massoud:
Design of Thermally Robust Clock Trees Using Dynamically Adaptive Clock Buffers. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(2): 374-383 (2009) - [j2]Arthur Nieuwoudt, Tamer Ragheb, Hamid Nejati, Yehia Massoud:
Numerical Design Optimization Methodology for Wideband and Multi-Band Inductively Degenerated Cascode CMOS Low Noise Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(6): 1088-1101 (2009) - 2008
- [c17]Hamid Nejati, Tamer Ragheb, Yehia Massoud:
On the design of customizable low-voltage common-gate LNA-mixer pair using current and charge reusing techniques. ACM Great Lakes Symposium on VLSI 2008: 195-200 - [c16]Tamer Ragheb, Yehia Massoud:
On the modeling of resistance in graphene nanoribbon (GNR) for future interconnect applications. ICCAD 2008: 593-597 - [c15]Hamid Nejati, Tamer Ragheb, Yehia Massoud:
Analytical modeling of common-gate low noise amplifiers. ISCAS 2008: 888-891 - [c14]Stephen Pfetsch, Tamer Ragheb, Jason N. Laska, Hamid Nejati, Anna C. Gilbert, Martin Strauss, Richard G. Baraniuk, Yehia Massoud:
On the feasibility of hardware implementation of sub-Nyquist random-sampling based analog-to-information conversion. ISCAS 2008: 1480-1483 - [c13]Amir Hosseini, Tamer Ragheb, Yehia Massoud:
A fault-aware dynamic routing algorithm for on-chip networks. ISCAS 2008: 2653-2656 - 2007
- [j1]Arthur Nieuwoudt, Tamer Ragheb, Yehia Massoud:
Narrow-band low-noise amplifier synthesis for high-performance system-on-chip design. Microelectron. J. 38(12): 1123-1134 (2007) - [c12]Arthur Nieuwoudt, Tamer Ragheb, Yehia Massoud:
Hierarchical Optimization Methodology for Wideband Low Noise Amplifiers. ASP-DAC 2007: 68-73 - [c11]Mosin Mondal, Andrew J. Ricketts, Sami Kirolos, Tamer Ragheb, Greg M. Link, Narayanan Vijaykrishnan, Yehia Massoud:
Thermally robust clocking schemes for 3D integrated circuits. DATE 2007: 1206-1211 - [c10]Jason N. Laska, Sami Kirolos, Marco F. Duarte
, Tamer Ragheb, Richard G. Baraniuk, Yehia Massoud:
Theory and Implementation of an Analog-to-Information Converter using Random Demodulation. ISCAS 2007: 1959-1962 - [c9]Hamid Nejati, Tamer Ragheb, Arthur Nieuwoudt, Yehia Massoud:
Modeling and Design of Ultrawideband Low Noise Amplifiers with Generalized Impedance Matching Networks. ISCAS 2007: 2622-2625 - [c8]Yehia Massoud, Arthur Nieuwoudt, Tamer Ragheb:
Variability-Aware Synthesis for Wideband Low Noise Amplifiers. ISCAS 2007: 3219-3222 - [c7]Mosin Mondal, Andrew J. Ricketts, Sami Kirolos, Tamer Ragheb, Greg M. Link, Narayanan Vijaykrishnan, Yehia Massoud:
Mitigating Thermal Effects on Clock Skew with Dynamically Adaptive Drivers. ISQED 2007: 67-72 - [c6]Arthur Nieuwoudt, Tamer Ragheb, Hamid Nejati, Yehia Massoud:
Increasing Manufacturing Yield for Wideband RF CMOS LNAs in the Presence of Process Variations. ISQED 2007: 801-806 - [c5]Mosin Mondal, Tamer Ragheb, Xiang Wu, Adnan Aziz, Yehia Massoud:
Provisioning On-Chip Networks under Buffered RC Interconnect Delay Variations. ISQED 2007: 873-878 - [c4]Arthur Nieuwoudt, Tamer Ragheb, Yehia Massoud:
Systematic Design Optimization Methodology for Multi-Band CMOS Low Noise Amplifiers. ISVLSI 2007: 139-144 - [c3]Xiang Wu, Tamer Ragheb, Adnan Aziz, Yehia Massoud:
Implementing DSP Algorithms with On-Chip Networks. NOCS 2007: 307-316 - 2006
- [c2]Arthur Nieuwoudt, Tamer Ragheb, Yehia Massoud:
SOC-NLNA: synthesis and optimization for fully integrated narrow-band CMOS low noise amplifiers. DAC 2006: 879-884 - [c1]Tamer Ragheb, Arthur Nieuwoudt, Yehia Massoud:
Efficient modeling of integrated narrow-band low noise amplifiers for design space exploration. ACM Great Lakes Symposium on VLSI 2006: 187-191
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