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Seung-Chul Lee
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2010 – 2019
- 2016
- [j12]Ji-Seon Paek
, Seung-Chul Lee, Yong-Sik Youn, Dong-Su Kim
A - 137 dBm/Hz Noise, 82% Efficiency AC-Coupled Hybrid Supply Modulator With Integrated Buck-Boost Converter. IEEE J. Solid State Circuits 51(11): 2757-2768 (2016) - [c14]Ji-Seon Paek, Yong-Sik Youn, Jeong-Hyun Choi, Dong-Su Kim, Jun-Hee Jung, Young-Hwan Choo, Sung-Jun Lee, Seung-Chul Lee, Thomas Byunghak Cho, Inyup Kang:
20.7 An RF-PA supply modulator achieving 83% efficiency and -136dBm/Hz noise for LTE-40MHz and GSM 35dBm applications. ISSCC 2016: 354-355 - 2015
- [c13]Seung-Chul Lee, Ji-Seon Paek, Jun-Hee Jung, Yong-Sik Youn, Sung-Jun Lee, Min-Soo Cho, Jae-Jol Han, Jung-Hyun Choi, Yong-Whan Joo, Takahiro Nomiyama, Su-Ho Lee, Il-Young Sohn, Thomas Byunghak Cho, Byeong-Ha Park, Inyup Kang:
2.7 A hybrid supply modulator with 10dB ET operation dynamic range achieving a PAE of 42.6% at 27.0dBm PA output power. ISSCC 2015: 1-3 - [c12]Si-Duk Sung, Sung-Wan Hong, Jun-Suk Bang, Ji-Seon Paek, Seung-Chul Lee, Thomas Byunghak Cho, Gyu-Hyeong Cho:
86.55% Peak efficiency envelope modulator for 1.5W 10MHz LTE PA without AC coupling capacitor. VLSIC 2015: 342- - 2014
- [j11]Seung-Chul Lee, Wan-Young Chung:
A robust wearable u-healthcare platform in wireless sensor network. J. Commun. Networks 16(4): 465-474 (2014) - [j10]Seung-Chul Lee, Yun Chiu
A 15-MHz Bandwidth 1-0 MASH Σ Δ ADC With Nonlinear Memory Error Calibration Achieving 85-dBc SFDR. IEEE J. Solid State Circuits 49(3): 695-707 (2014) - 2013
- [c11]Sung-Min Jung
Optical modeling of lenticular array for autostereoscopic displays. SD&A 2013: 864805 - 2012
- [b1]Seung-Chul Lee:
Digital calibration of nonlinear memory errors in sigma-delta ADCs. University of Illinois Urbana-Champaign, USA, 2012 - [c10]Sung-Min Jung
New approach on calculating multiview 3D crosstalk for autostereoscopic displays. SD&A 2012: 828818 - [c9]Seung-Chul Lee, Brian Elies, Yun Chiu
An 85dB SFDR 67dB SNDR 8OSR 240MS/s ΔΣ ADC with nonlinear memory error calibration. VLSIC 2012: 164-165 - 2011
- [j9]Pingli Huang, Szukang Hsien, Victor Lu, Peiyuan Wan, Seung-Chul Lee, Wenbo Liu, Bo-Wei Chen, Yung-Pin Lee, Wen-Tsao Chen, Tzu-Yi Yang, Gin-Kou Ma, Yun Chiu
SHA-Less Pipelined ADC With In Situ Background Clock-Skew Calibration. IEEE J. Solid State Circuits 46(8): 1893-1903 (2011) - [j8]Seung-Chul Lee, Yun Chiu:
Digital Calibration of Capacitor Mismatch in Sigma-Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(4): 690-698 (2011) - 2010
- [j7]Seung-Chul Lee, Yun Chiu
Digital Calibration of Nonlinear Memory Errors in Sigma-Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2462-2475 (2010) - [j6]Bei Peng, Hao Li, Seung-Chul Lee, Pingfen Lin, Yun Chiu:
A Virtual-ADC Digital Background Calibration Technique for Multistage A/D Conversion. IEEE Trans. Circuits Syst. II Express Briefs 57-II(11): 853-857 (2010) - [c8]Pingli Huang, Szukang Hsien, Victor Lu, Peiyuan Wan, Seung-Chul Lee, Wenbo Liu, Bo-Wei Chen, Yung-Pin Lee, Wen-Tsao Chen, Tzu-Yi Yang, Gin-Kou Ma, Yun Chiu:
SHA-less pipelined ADC converting 10th Nyquist band with in-situ clock-skew calibration. CICC 2010: 1-4
2000 – 2009
- 2008
- [j5]In-Hwan Ji, Min-Woo Ha, Young-Hwan Choi, Seung-Chul Lee, Chong-Man Yun, Min-Koo Han:
A new fault current-sensing scheme for fast fault protection of the insulated gate bipolar transistor. Microelectron. J. 39(6): 908-913 (2008) - 2007
- [j4]Vinay Kumar Singh, Seung-Chul Lee, Hyotaek Lim, Risto Myllylä, Wan-Young Chung:
Indoor Passive Location Tracking and Activity Monitoring using WSN for Ubiquitous Healthcare. J. Inform. and Commun. Convergence Engineering 5(4): 382-388 (2007) - [j3]Seung-Chul Lee, Young-Deuk Jeon, Jong-Kee Kwon, Jongdae Kim:
A 10-bit 205-MS/s 1.0-mm2 90-nm CMOS Pipeline ADC for Flat Panel Display Applications. IEEE J. Solid State Circuits 42(12): 2688-2695 (2007) - [c7]Young-Deuk Jeon, Seung-Chul Lee, Kwi-Dong Kim, Jong-Kee Kwon, Jongdae Kim:
A 4.7mW 0.32mm2 10b 30MS/s Pipelined ADC Without a Front-End S/H in 90nm CMOS. ISSCC 2007: 456-615 - [c6]Seung-Chul Lee, Young-Deuk Jeon, Kwi-Dong Kim, Jong-Kee Kwon, Jongdae Kim, Jeong-Woong Moon, Woo-Yol Lee:
A 10b 205MS/s 1mm2 90nm CMOS Pipeline ADC for Flat-Panel Display Applications. ISSCC 2007: 458-615 - 2006
- [j2]Seung-Chul Lee, Kwi-Dong Kim, Jong-Kee Kwon, Jongdae Kim, Seung-Hoon Lee:
A 10-bit 400-MS/s 160-mW 0.13-μm CMOS dual-channel pipeline ADC without channel mismatch calibration. IEEE J. Solid State Circuits 41(7): 1596-1605 (2006) - [c5]Ja-Yol Lee, Kwi-Dong Kim, Jong-Kee Kwon, Seung-Chul Lee, Jongdae Kim, Sang-Heung Lee:
A 3.8-5.5-GHz Multi-Band CMOS Frequency Synthesizer for WPAN/WLAN Applications. CICC 2006: 377-380 - [c4]Young-Jae Cho, Doo-Hwan Sa, Yong-Woo Kim, Kyung-Hoon Lee, Hee-Cheol Choi, Seung-Hoon Lee, Young-Deuk Jeon, Seung-Chul Lee, Jong-Kee Kwon:
A 10b 25MS/s 4.8mW 0.13um CMOS ADC for Digital Multimedia Broadcasting Applications. CICC 2006: 497-500 - 2005
- [c3]Seung-Chul Lee, Gyu-Hyun Kim, Jong-Kee Kwon, Jongdae Kim, Seung-Hoon Lee:
Offset and dynamic gain-mismatch reduction techniques for 10b 200ms/s parallel pipeline ADCs. ESSCIRC 2005: 531-534 - 2000
- [j1]Jin Park, Seung-Chul Lee, Jin-Sik Yoon, Seung-Hoon Lee:
A 3 V 10 b 100 MS/s digital-to-analog converter for cable modem applications. IEEE Trans. Consumer Electron. 46(4): 1043-1047 (2000) - [c2]Young-Deuk Jeon, Byeong-Lyeol Jeon, Seung-Chul Lee, Sang-Min Yoo, Seung-Hoon Lee:
A 12b 50 MHz 3.3V CMOS acquisition time minimized A/D converter. ASP-DAC 2000: 613-616 - [c1]Young-Deuk Jeon, Seung-Chul Lee, Sang-Min Yoo, Seung-Hoon Lee:
Acquisition-time minimization and merged-capacitor switching techniques for sampling-rate and resolution improvement of CMOS ADCs. ISCAS 2000: 451-454
Coauthor Index
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