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Giacomo Buonanno
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2020 – today
- 2021
- [c23]Angela Locoro
, Paolo Buono, Giacomo Buonanno:
Interacting with More Than One Chart: What Is It All About? INTERACT (5) 2021: 447-450
2010 – 2019
- 2011
- [j11]Federico Pigni
Interorganisational systems within SMEs aggregations: an exploratory study on information requirements of an industrial district. Int. J. Inf. Technol. Manag. 10(2/3/4): 208-232 (2011)
2000 – 2009
- 2005
- [j10]Giacomo Buonanno, Paolo Faverio, Federico Pigni
Factors affecting ERP system adoption: A comparative analysis between SMEs and large companies. J. Enterp. Inf. Manag. 18(4): 384-426 (2005) - [c22]Giacomo Buonanno, Federico Pigni, Aurelio Ravarini, Donatella Sciuto:
Exploring the Role of Inter-Organizational Information Systems within SMEs Aggregations. Bled eConference 2005: 26 - [c21]Paolo Faverio, Donatella Sciuto, Giacomo Buonanno:
Using Critical Success Factors for Assessing Critical Activities in ERP Implementation within SMEs. ICEIS (1) 2005: 285-292 - 2000
- [j9]Giacomo Buonanno, Franco Fummi, Donatella Sciuto:
An extended-UIO-based method for protocol conformance testing. J. Syst. Archit. 46(3): 225-242 (2000) - [c20]Giacomo Buonanno, Stefano Gramignoli, Aurelio Ravarini, Marco Tagliavini, Donatella Sciuto:
ICT diffusion and strategic role within Italian SMEs. IRMA Conference 2000: 373-378
1990 – 1999
- 1998
- [j8]Giacomo Buonanno, Mariagiovanna Sami:
Co-Testing: Granting Testability in a Codesign Environment. Integr. Comput. Aided Eng. 5(1): 7-18 (1998) - [c19]Marco Broglia, Giacomo Buonanno, Mariagiovanna Sami, M. Selvini:
Designing for Yield: A Defect-Tolerant Approach to High-Level Synthesis. DFT 1998: 312-317 - 1997
- [c18]Cristiana Bolchini, Giacomo Buonanno, M. Cozzini, Donatella Sciuto, Renato Stefanelli:
Designing Ad-Hoc Codes for the Realization of Fault Tolerant CMOS Networks. DFT 1997: 204-211 - [c17]Giacomo Buonanno, Fabrizio Ferrandi
How an "Evolving" Fault Model Improves the Behavioral Test Generation. Great Lakes Symposium on VLSI 1997: 124- - [c16]M. Bacis, Giacomo Buonanno, Fabrizio Ferrandi
Application of a Testing Framework to VHDL Descriptions at Different Abstraction Levels. ICCD 1997: 654-658 - [c15]Giacomo Buonanno, M. Pugassi, Mariagiovanna Sami:
A high-level synthesis approach to design of fault-tolerant systems. VTS 1997: 356-363 - 1996
- [c14]Cristiana Bolchini, Giacomo Buonanno, Donatella Sciuto, Renato Stefanelli:
Fault detection and fault tolerance issues at CMOS level through AUED encoding. DFT 1996: 258-267 - 1995
- [j7]Giacomo Buonanno, Franco Fummi, Donatella Sciuto:
TIES: A testability increase expert system for VLSI design. J. Electron. Test. 6(2): 203-217 (1995) - [c13]Giacomo Buonanno, Fabio Salice, Donatella Sciuto:
Behavior of Self-Checking Checkers for 1-out-of-3 Codes Based on Pass-Transistor Logic. ISCAS 1995: 1924-1927 - [c12]Giacomo Buonanno, Fabrizio Ferrandi, Donatella Sciuto:
Data Path Testability Analysis Based on BDDs. ISCAS 1995: 2012-2014 - [c11]Cristiana Bolchini, Giacomo Buonanno, Donatella Sciuto, Renato Stefanelli:
A new switching-level approach to multiple-output functions synthesis. VLSI Design 1995: 125-129 - 1994
- [j6]Giacomo Buonanno, Donatella Sciuto
Innovative Structures for CMOS Combinational Gates Synthesis. IEEE Trans. Computers 43(4): 385-399 (1994) - [j5]Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi
ALADIN: a multilevel testability analyzer for VLSI system design. IEEE Trans. Very Large Scale Integr. Syst. 2(2): 157-171 (1994) - [c10]Cristiana Bolchini, Giacomo Buonanno, Donatella Sciuto, Renato Stefanelli:
A CMOS Fault Tolerant Architecture for Swith-Level Faults. DFT 1994: 10-18 - [c9]Cristiana Bolchini, Giacomo Buonanno, Donatella Sciuto, Renato Stefanelli:
CMOS Reliability Improvements Through a New Fault Tolerant Technique. ISCAS 1994: 83-86 - 1993
- [j4]Giacomo Buonanno, Fabrizio Lombardi, Donatella Sciuto
Fault detection in TFCMOS/DFCMOS combinational gates. Integr. 15(2): 201-227 (1993) - [c8]Giacomo Buonanno, Franco Fummi, Donatella Sciuto:
Fault Detection in Sequential Circuits through Functional Testing. DFT 1993: 191-198 - [c7]Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza:
Reduction of Fault Detection Costs through Testable Design of Sequential Architectures with Signal Feedbacks. DFT 1993: 223-230 - [c6]Giacomo Buonanno, Franco Fummi, Donatella Sciuto:
Functional Fault Models and Gate Level Coverage for Sequential Architectures. ICCD 1993: 572-575 - [c5]Giacomo Buonanno, Franco Fummi, Donatella Sciuto:
Functional Testing and Constrained Synthesis of Sequential Architectures. ISCAS 1993: 1523-1526 - [c4]Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza:
An Expert Solution to Functional Testability Analysis of VLSI Circuits. SEKE 1993: 263-265 - [c3]Giacomo Buonanno, Donatella Sciuto, Renato Stefanelli:
New CMOS Structures for the Synthesis of Dominant Functions. VLSI Design 1993: 367-370 - 1992
- [j3]Giacomo Buonanno, Micaela Serra:
State assignment and testability of PLA-based finite state machines. Microprocess. Microprogramming 35(1-5): 391-398 (1992) - [c2]Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Donatella Sciuto, Giuseppe Zaza:
A multi level testability assistant for VLSI design. EURO-DAC 1992: 258-263 - 1991
- [j2]Giacomo Buonanno, Fabrizio Lombardi, Donatella Sciuto
Multiple stuck-at faults detection in CMOS combinational gates. Microprocessing and Microprogramming 32(1-5): 775-782 (1991) - [c1]Giacomo Buonanno, Donatella Sciuto, Renato Stefanelli:
Optimization techniques for multiple output function synthesis. EURO-DAC 1991: 545-551 - 1990
- [j1]Giacomo Buonanno, A. Burri, Franco Fummi, Donatella Sciuto
An approach to a design for testability personal consultant. Microprocessing and Microprogramming 30(1-5): 405-412 (1990)
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