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Shin'ichi Miura
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2020 – today
- 2023
- [c19]Masahiro Nakao
, Hidetomo Kaneyama
Introducing Open OnDemand to Supercomputer Fugaku. SC Workshops 2023: 720-727 - 2021
- [c18]Masaaki Terai, Keiji Yamamoto, Shin'ichi Miura, Fumiyoshi Shoji:
An Operational Data Collecting and Monitoring Platform for Fugaku: System Overviews and Case Studies in the Prelaunch Service Period. ISC Workshops 2021: 365-377
2010 – 2019
- 2019
- [c17]Jens Domke, Satoshi Matsuoka, Ivan Radanov, Yuki Tsushima, Tomoya Yuki, Akihiro Nomura
The First Supercomputer with HyperX Topology: A Viable Alternative to Fat-Trees? Hot Interconnects 2019: 1-4 - [c16]Jens Domke, Satoshi Matsuoka, Ivan R. Ivanov
HyperX topology: first at-scale implementation and comparison to the fat-tree. SC 2019: 40:1-40:23 - 2011
- [j1]Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Toshihiro Hanawa
Peach: A Multicore Communication System on Chip with PCI Express. IEEE Micro 31(6): 39-50 (2011) - [c15]Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa
An 80 Gbps dependable multicore communication SoC with PCI express I/F and intelligent interrupt controller. COOL Chips 2011: 1-3 - [c14]Shin'ichi Miura, Toshihiro Hanawa
XMCAPI: Inter-core Communication Interface on Multi-chip Embedded Systems. EUC 2011: 397-402 - [c13]Toshihiro Hanawa
PEARL and PEACH: A Novel PCI Express Direct Link and Its Implementation. IPDPS Workshops 2011: 871-879 - [c12]Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Yasushi Hayakawa, Takeshi Oshita, Satoshi Kaneko, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa
An 80Gb/s dependable communication SoC with PCI express I/F and 8 CPUs. ISSCC 2011: 266-268 - 2010
- [c11]Toshihiro Hanawa
PEARL: Power-Aware, Dependable, and High-Performance Communication Link Using PCI Express. GreenCom/CPSCom 2010: 284-291 - [c10]Toshihiro Hanawa
Customizing Virtual Machine with Fault Injector by Integrating with SpecC Device Model for a Software Testing Environment D-Cloud. PRDC 2010: 47-54 - [c9]Hajime Fujita, Motohiko Matsuda, Toshiyuki Maeda, Shin'ichi Miura, Yutaka Ishikawa:
P-Bus: Programming Interface Layer for Safe OS Kernel Extensions. PRDC 2010: 235-236
2000 – 2009
- 2009
- [c8]Taiga Yonemoto, Shin'ichi Miura, Toshihiro Hanawa
Flexible Multi-link Ethernet Binding System for PC Clusters with Asymmetric Topology. ICPADS 2009: 49-56 - [c7]Shin'ichi Miura, Toshihiro Hanawa
RI2N/DRV: Multi-link ethernet for high-bandwidth and fault-tolerant network on PC clusters. IPDPS 2009: 1-7 - [c6]Yutaka Ishikawa, Hajime Fujita, Toshiyuki Maeda, Motohiko Matsuda, Midori Sugaya, Mitsuhisa Sato, Toshihiro Hanawa
Towards an Open Dependable Operating System. ISORC 2009: 20-27 - 2008
- [c5]Shin'ichi Miura, Takayuki Okamoto, Taisuke Boku, Toshihiro Hanawa
RI2N: High-bandwidth and fault-tolerant network with multi-link Ethernet for PC clusters. CLUSTER 2008: 274-279 - [c4]Shin'ichi Miura, Taisuke Boku, Takayuki Okamoto, Toshihiro Hanawa
A dynamic routing control system for high-performance PC cluster with multi-path Ethernet connection. IPDPS 2008: 1-8 - 2007
- [c3]Takayuki Okamoto, Shin'ichi Miura, Taisuke Boku, Mitsuhisa Sato, Daisuke Takahashi
RI2N/UDP: High bandwidth and fault-tolerant network for a PC-cluster based on multi-link Ethernet. IPDPS 2007: 1-8 - 2005
- [c2]Shin'ichi Miura, Taisuke Boku, Mitsuhisa Sato, Daisuke Takahashi
Low-cost High-bandwidth Tree Network for PC Clusters based on Tagged-VLAN Technology. ISPAN 2005: 84-93 - 2003
- [c1]Shin'ichi Miura, Taisuke Boku, Mitsuhisa Sato, Daisuke Takahashi
RI2N - Interconnection Network System for Clusters with Wide-Bandwidth and Fault-Tolerancy Based on Multiple Links. ISHPC 2003: 342-351
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