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Fujihiko Matsumoto
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2020 – today
- 2024
- [j11]Fujihiko Matsumoto, Hinano Ohtsu:
Consideration of Integrated Low-Frequency Low-Pass Notch Filter Employing CCII Based Capacitance Multipliers. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 107(1): 114-118 (2024)
2010 – 2019
- 2018
- [c7]Takeshi Ohbuchi, Koutarou Fujishiro, Fujihiko Matsumoto:
A Design of a Programmable Impedance Scaling Circuit for Low Frequency Applications. ISPACS 2018: 386-391 - 2017
- [c6]Fujihiko Matsumoto, Takeshi Ohbuchi, Hironori Nakamura, Shota Matsuo:
A design method of low frequency universal filter employing MOCCIIs. MIXDES 2017: 55-60 - [c5]Takeshi Ohbuchi, Fujihiko Matsumoto:
Improvement technique of tuning range for local-feedback MOS transconductor. MIXDES 2017: 95-100 - 2016
- [c4]Fujihiko Matsumoto, Shota Matsuo, Syuzo Nishioka, Hakumi Abe, Takeshi Ohbuchi:
Study on offset reduction method for a fully differential filter employing symmetrical floating impedance scaling circuits. ISPACS 2016: 1-5 - [c3]Takeshi Ohbuchi, Fujihiko Matsumoto:
A linear transconductor utilizing body transconductance for low-power and low frequency applications. ISPACS 2016: 1-6 - 2013
- [c2]Fujihiko Matsumoto, Tatsuya Fujii, Syuzo Nishioka, Tomomi Abe, Takeshi Ohbuchi:
Design of a floating-type impedance scaling circuit for large capacitances. ISPACS 2013: 391-396 - [c1]Takeshi Ohbuchi, Fujihiko Matsumoto:
A design of a low-transconductance linear transconductor utilizing body effect for low frequency applications. ISPACS 2013: 674-679 - 2011
- [j10]Shintaro Nakamura, Fujihiko Matsumoto, Pravit Tongpoon, Yasuaki Noguchi:
Noise Analysis and Design of Low-Noise Bias-Offset MOS Transconductor. IEICE Trans. Electron. 94-C(1): 128-131 (2011) - [j9]Pravit Tongpoon, Fujihiko Matsumoto, Takeshi Ohbuchi, Hitoshi Takeuchi:
A Differential Input/Output Linear MOS Transconductor. IEICE Trans. Electron. 94-C(6): 1032-1041 (2011)
2000 – 2009
- 2009
- [j8]Yasuaki Noguchi, Fujihiko Matsumoto, Kazuo Maeda, Takashi Nagasawa:
Neural Network Analysis and Evaluation of the Fetal Heart Rate. Algorithms 2(1): 19-30 (2009) - 2006
- [j7]Isamu Yamaguchi, Fujihiko Matsumoto, Makoto Izuma, Yasuaki Noguchi:
A New Linear Transconductor Combining a Source Coupled Pair with a Transconductor Using Bias-Offset Technique. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(2): 369-376 (2006) - [j6]Fujihiko Matsumoto, Isamu Yamaguchi, Akira Yachidate, Yasuaki Noguchi:
A Technique to Reduce Power Consumption for a Linear Transconductor. IEICE Trans. Electron. 89-C(6): 814-818 (2006) - 2004
- [j5]Fujihiko Matsumoto, Shintaro Nakamura, Hiroki Wasaki, Yasuaki Noguchi:
Linear bipolar OTAs employing exponential-law circuits. Int. J. Circuit Theory Appl. 32(4): 255-274 (2004) - [j4]Fujihiko Matsumoto, Yasuaki Noguchi:
Linear bipolar OTAs based on a triple-tail cell employing exponential circuits. IEEE Trans. Circuits Syst. II Express Briefs 51-II(12): 670-674 (2004) - 2003
- [j3]Yasuaki Noguchi, Nobuyuki Miyao, Fujihiko Matsumoto:
Far-End Crosstalk Voltage for a CMOS-IC Inverter Load. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(6): 1451-1457 (2003) - 2002
- [j2]Fujihiko Matsumoto, Hiroki Wasaki, Yasuaki Noguchi:
Current Feedforward Phase Compensation Technique for an Integrator and Its Application to an Auto-Compensation System. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(6): 1192-1199 (2002) - [j1]Fujihiko Matsumoto, Hiroki Wasaki, Yasuaki Noguchi:
Low-Voltage Linear Bipolar OTAs Employing Hyperbolic Circuits with an Intermediate Voltage Terminal. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(6): 1200-1208 (2002)
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