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Alexander Biedermann
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2010 – 2019
- 2017
- [c8]Hien Q. Dang
, Johannes Fürnkranz
Time-to-lane-change prediction with deep learning. ITSC 2017: 1-7 - 2015
- [j2]Alexander Biedermann, Sorin A. Huss, Adeel Israr:
Safe Dynamic Reshaping of Reconfigurable MPSoC Embedded Systems for Self-Healing and Self-Adaption Purposes. ACM Trans. Reconfigurable Technol. Syst. 8(4): 26:1-26:22 (2015) - 2014
- [b1]Alexander Biedermann:
Design Concepts for a Virtualizable Embedded MPSoC Architecture - Enabling Virtualization in Embedded Multi-Processor Systems. Darmstadt University of Technology, Springer 2014, ISBN 978-3-658-08046-4, pp. 1-187 - 2013
- [c7]Alexander Biedermann, Sorin A. Huss:
A Methodology for Invasive Programming on Virtualizable Embedded MPSoC Architectures. ICCS 2013: 359-368 - [c6]Alexander Biedermann, Boris Dreyer
A generic, scalable reconfiguration infrastructure for sensor networks functionality adaption. SoCC 2013: 301-306 - 2012
- [c5]Alexander Biedermann, Sorin A. Huss:
Hardware virtualization-driven software task switching in reconfigurable multi-processor system-on-chip architectures. Map2MPSoC/SCOPES 2012: 32-41 - 2011
- [c4]Alexander Biedermann, Marc Stöttinger
Secure Virtualization within a Multi-processor Soft-Core System-on-Chip Architecture. ARC 2011: 385-396 - [c3]Alexander Biedermann, Thorsten Piper, Lars Patzina, Sven Patzina, Sorin A. Huss, Andy Schürr, Neeraj Suri:
Enhancing FPGA Robustness via Generic Monitoring IP Cores. PECCS 2011: 379-386 - 2010
- [j1]Naseer Iqbal
QCM-Arrays for Sensing Terpenes in Fresh and Dried Herbs via Bio-Mimetic MIP Layers. Sensors 10(7): 6361-6376 (2010) - [c2]Marc Stöttinger
Virtualization within a Parallel Array of Homogeneous Processing Units. ARC 2010: 17-28 - [c1]André Seffrin, Alexander Biedermann, Sorin A. Huss:
Tiny-Pi: A Novel Formal Method for Specification, Analysis and Verification of Dynamic Partial Reconfiguration Processes. FDL 2010: 86-91
Coauthor Index
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