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Ron Ho
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2010 – 2019
- 2017
- [c26]David Greenhill, Ron Ho, David M. Lewis, Herman Schmit, Kok Hong Chan, Andy Tong, Sean Atsatt, Dana How
, Peter McElheny, Keith Duwel, Jeffrey Schulz, Darren Faulkner, Gopal Iyer, George Chen, Hee Kong Phoon, Han Wooi Lim, Wei-Yee Koay, Ty Garibay:
3.3 A 14nm 1GHz FPGA with 2.5D transceiver integration. ISSCC 2017: 54-55 - 2016
- [c25]Cagla Cakir, Ron Ho, Jon K. Lexau, Ken Mai:
Scalable High-Radix Modular Crossbar Switches. Hot Interconnects 2016: 37-44 - 2015
- [c24]Cagla Cakir, Ron Ho, Jon K. Lexau, Ken Mai:
High-efficiency crossbar switches using capacitively coupled signaling. ISLPED 2015: 98-103 - [c23]Cagla Cakir, Ron Ho, Jon K. Lexau, Ken Mai:
Modeling and Design of High-Radix On-Chip Crossbar Switches. NOCS 2015: 20:1-20:8 - 2013
- [j13]Tamer A. Ali, Robert J. Drost, Ron Ho, Chih-Kong Ken Yang:
A 100+ Meter 12 Gb/s/Lane Copper Cable Link Based on Clock-Forwarding. IEEE J. Solid State Circuits 48(4): 1085-1098 (2013) - [c22]Xuezhe Zheng, Eric Chang, Ivan Shubin, Guoliang Li, Ying Luo, Jin Yao, Hiren D. Thacker, Jin-Hyoung Lee, Jon K. Lexau, Frankie Liu, Philip Amberg, Kannan Raj, Ron Ho, John E. Cunningham, Ashok V. Krishnamoorthy:
A 33mW 100Gbps CMOS silicon photonic WDM transmitter using off-chip laser sources. OFC/NFOEC 2013: 1-3 - [c21]Eric Chang, Frankie Liu, Philip Amberg, Jon K. Lexau, Ron Ho:
Efficient techniques for canceling transceiver noise. VLSI-DAT 2013: 1-4 - 2012
- [j12]Frankie Liu, Dinesh Patil, Jon K. Lexau, Philip Amberg, Michael Dayringer, Jonathan Gainsley, Hesam Fathi Moghadam, Xuezhe Zheng, John E. Cunningham, Ashok V. Krishnamoorthy, Elad Alon, Ron Ho:
10-Gbps, 5.3-mW Optical Transmitter and Receiver Circuits in 40-nm CMOS. IEEE J. Solid State Circuits 47(9): 2049-2067 (2012) - [c20]Pranay Koka, Michael O. McCracken, Herb Schwetman, Chia-Hsin Owen Chen, Xuezhe Zheng, Ron Ho, Kannan Raj, Ashok V. Krishnamoorthy:
A micro-architectural analysis of switched photonic multi-chip interconnects. ISCA 2012: 153-164 - [c19]Tamer A. Ali, Won Ho Park, Preeti Mulage, E-Hung Chen, Ron Ho, Chih-Kong Ken Yang:
A 100+ meter 12Gb/s/lane copper cable link based on clock-forwarding. VLSIC 2012: 108-109 - 2011
- [j11]Xuezhe Zheng, Pranay Koka, Michael O. McCracken, Herb Schwetman, James G. Mitchell, Jin Yao, Ron Ho, Kannan Raj, Ashok V. Krishnamoorthy:
Energy-Efficient Error Control for Tightly Coupled Systems Using Silicon Photonic Interconnects. JOCN 3(8): A21-A31 (2011) - [c18]Philip Amberg, Frankie Liu, Michael Dayringer, Jon K. Lexau, Dinesh Patil, Jonathan Gainsley, Hesam Fathi Moghadam, Elad Alon, Xuezhe Zheng, John E. Cunningham, Ashok V. Krishnamoorthy, Ron Ho:
Digitally-assisted analog circuits for a 10 Gbps, 395 fJ/b optical receiver in 40 nm CMOS. A-SSCC 2011: 29-32 - [c17]Tamer A. Ali, Amr Amin Hafez, Robert J. Drost, Ronald Ho, Chih-Kong Ken Yang:
A 4.6GHz MDLL with -46dBc reference spur and aperture position tuning. ISSCC 2011: 466-468 - 2010
- [j10]Ron Ho, Frankie Liu, Dinesh Patil, Xuezhe Zheng, Guoliang Li, Ivan Shubin, Elad Alon, Jon K. Lexau, Herb Schwetman, John E. Cunningham, Ashok V. Krishnamoorthy:
Optical Interconnect for High-End Computer Systems. IEEE Des. Test Comput. 27(4): 10-19 (2010) - [j9]Vladimir Stojanovic, Chih-Kong Ken Yang, Ron Ho:
Guest Editorial for Special Issue on High-Performance Multichip Interconnections. IEEE Trans. Circuits Syst. II Express Briefs 57-II(5): 317-318 (2010) - [c16]Tamer A. Ali, Dinesh Patil, Frankie Liu, Elad Alon, Jon K. Lexau, Chih-Kong Ken Yang, Ron Ho:
Clocking Links in Multi-chip Packages: A Case Study. Hot Interconnects 2010: 96-103 - [c15]Ron Ho, John E. Cunningham, Herb Schwetman, Xuezhe Zheng, Ashok V. Krishnamoorthy:
Optical Interconnects in the Data Center. Hot Interconnects 2010: 117-120 - [c14]Pranay Koka, Michael O. McCracken, Herb Schwetman, Xuezhe Zheng, Ron Ho, Ashok V. Krishnamoorthy:
Silicon-photonic network architectures for scalable, power-efficient multi-chip systems. ISCA 2010: 117-128 - [c13]Jae-sun Seo, Ron Ho, Jon K. Lexau, Michael Dayringer, Dennis Sylvester, David T. Blaauw:
High-bandwidth and low-energy on-chip signaling with adaptive pre-emphasis in 90nm CMOS. ISSCC 2010: 182-183
2000 – 2009
- 2009
- [j8]Donhee Ham
Introduction to the Special Issue on the 2008 IEEE International Solid-State Circuits Conference. IEEE J. Solid State Circuits 44(1): 3-6 (2009) - [j7]Ashok V. Krishnamoorthy, Ron Ho, Xuezhe Zheng, Herb Schwetman, Jon K. Lexau, Pranay Koka, Guoliang Li, Ivan Shubin, John E. Cunningham:
Computer Systems Based on Silicon Photonic Interconnects. Proc. IEEE 97(7): 1337-1361 (2009) - 2008
- [j6]Ron Ho, Tarik Ono, Robert David Hopkins, Alex Chow, Justin Schauer, Frankie Y. Liu, Robert J. Drost:
High Speed and Low Energy Capacitively Driven On-Chip Wires. IEEE J. Solid State Circuits 43(1): 52-60 (2008) - [c12]Ashok V. Krishnamoorthy, Jon K. Lexau, Xuezhe Zheng, John E. Cunningham, Ron Ho, Ola Tørudbakken:
Optical Interconnects for Present and Future High-Performance Computing Systems. Hot Interconnects 2008: 175-177 - [c11]Ron Ho:
Transistor Variability in Nanometer-Scale Technologies (Forum). ISSCC 2008: 660-661 - 2007
- [j5]John D. Owens, William J. Dally, Ron Ho, Doddaballapur Narasimha-Murthy Jayasimha, Stephen W. Keckler, Li-Shiuan Peh:
Research Challenges for On-Chip Interconnection Networks. IEEE Micro 27(5): 96-108 (2007) - [c10]Dinesh Patil, Omid Azizi, Mark Horowitz, Ron Ho, Rajesh Ananthraman:
Robust Energy-Efficient Adder Topologies. IEEE Symposium on Computer Arithmetic 2007: 16-28 - [c9]Frankie Liu, Ron Ho, Robert J. Drost, Scott Fairbanks:
On-chip samplers for test and debug of asynchronous circuits. ASYNC 2007: 153-162 - [c8]David Hopkins, Alex Chow, Robert Bosnyak, Bill Coates, Jo C. Ebergen, Scott Fairbanks, Jonathan Gainsley, Ron Ho, Jon K. Lexau, Frankie Liu, Tarik Ono, Justin Schauer, Ivan E. Sutherland, Robert J. Drost:
Circuit Techniques to Enable 430Gb/s/mm2 Proximity Communication. ISSCC 2007: 368-609 - [c7]Ron Ho, Tarik Ono, Frankie Liu, Robert David Hopkins, Alex Chow, Justin Schauer, Robert J. Drost:
High-Speed and Low-Energy Capacitively-Driven On-Chip Wires. ISSCC 2007: 412-612 - 2005
- [j4]Ken Mai
Architecture and circuit techniques for a 1.1-GHz 16-kb reconfigurable memory in 0.18-μm CMOS. IEEE J. Solid State Circuits 40(1): 261-275 (2005) - [c6]Robert J. Drost, Craig Forrest, Bruce Guenin, Ron Ho, Ashok V. Krishnamoorthy, Danny Cohen, John E. Cunningham, Bernard Tourancheau, Arthur Zingher, Alex Chow, Gary Lauterbach, Ivan E. Sutherland:
Challenges in Building a Flat-Bandwidth Memory Hierarchy for a Large-Scale Computer with Proximity Communication. Hot Interconnects 2005: 13-22 - [c5]Ron Ho:
High-performance ULSI: the real limiter to interconnect scaling. SLIP 2005: 3 - 2004
- [j3]Robert J. Drost, Robert David Hopkins, Ron Ho, Ivan E. Sutherland:
Proximity communication. IEEE J. Solid State Circuits 39(9): 1529-1535 (2004) - [c4]Yun Zhang, Mihai Burcea, Victor Cheng, Ron Ho, Michael Voss:
An Adaptive OpenMP Loop Scheduler for Hyperthreaded SMPs. PDCS 2004: 256-263 - [c3]Ron Ho, Jonathan Gainsley, Robert J. Drost:
Long Wires and Asynchronous Control. ASYNC 2004: 240-249 - 2001
- [j2]Ron Ho, Kenneth Mai
The future of wires. Proc. IEEE 89(4): 490-504 (2001) - 2000
- [c2]Ken Mai, Tim Paaske, Nuwan Jayasena, Ron Ho, William J. Dally, Mark Horowitz:
Smart Memories: a modular reconfigurable architecture. ISCA 2000: 161-171
1990 – 1999
- 1999
- [c1]Ron Ho, Ken Mai, Hema Kapadia, Mark Horowitz:
Interconnect scaling implications for CAD. ICCAD 1999: 425-429 - 1998
- [j1]Kenneth W. Mai
Low-power SRAM design using half-swing pulse-mode techniques. IEEE J. Solid State Circuits 33(11): 1659-1671 (1998)
Coauthor Index
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