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Takao Waho
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2020 – today
- 2024
- [j14]Takao Waho, Akihisa Koyama, Hitoshi Hayashi:
Delta-Sigma Domain Signal Processing Revisited with Related Topics in Stochastic Computing. IEICE Trans. Inf. Syst. 107(8): 966-975 (2024) - [c40]Akihisa Koyama, Takao Waho, Hitoshi Hayashi:
Signal processing with delta-sigma modulated bitstreams for artificial neurons. ISMVL 2024: 47-52 - 2023
- [c39]Takao Waho, Akihisa Koyama, Hitoshi Hayashi:
Delta-Sigma Domain Signal Processing: A Review with Relevant Topics in Stochastic Computing. ISMVL 2023: 88-93 - 2021
- [j13]Takao Waho, Tomoaki Koizumi, Hitoshi Hayashi:
A ΔΣ-Modulation Feedforward Network for Non-Binary Analog-to-Digital Converters. IEICE Trans. Inf. Syst. 104-D(8): 1130-1137 (2021) - [c38]Tomoaki Koizumi, Takao Waho, Hitoshi Hayashi:
A Delta-Sigma-Modulation Multi-Channel Network with Improved Noise-Shaping Characteristics. ISCAS 2021: 1-5 - [c37]Takao Waho, Tomoaki Koizumi, Hitoshi Hayashi:
A multi-level cascaded delta-sigma modulator with reduced quantization noise leakage. ISMVL 2021: 201-206 - 2020
- [c36]Takao Waho:
A delta-sigma-modulator feedforward network for a non-binary analog-to-digital converter. ISMVL 2020: 143-148
2010 – 2019
- 2018
- [j12]Takao Waho:
A Noise-shaping Analog-to-Digital Converter using a ΔΣ Modulator Feedforward Network. FLAP 5(9): 1833-1848 (2018) - [c35]Takao Waho:
An Analog-to-Digital Converter Using Delta-Sigma Modulator Network. ISMVL 2018: 25-30 - 2017
- [c34]Takao Waho:
Analog-to-Digital Converters Using Not Multi-level But Multi-bit Feedback Paths. ISMVL 2017: 7-12 - 2015
- [c33]Uichi Ishida, Yusuke Yamazaki, Takao Waho:
Non-Binary Analog-to-Digital Converter Based on Amoeba-Inspired Neural Network. ISMVL 2015: 103-108 - 2014
- [j11]Ryo Matsushiba, Hiroaki Kotani, Takao Waho:
An Energy-Efficient ΔΣ Modulator Using Dynamic-Common-Source Integrators. IEICE Trans. Electron. 97-C(5): 438-443 (2014) - [j10]Takao Waho:
Foreword. IEICE Trans. Inf. Syst. 97-D(9): 2217 (2014) - [c32]Ryo Matsushiba, Kazuma Ohara, Takao Waho:
An energy-efficient dynamic-integrator-based ΔΣ modulator. ICECS 2014: 467-470 - [c31]Takao Waho:
Non-binary Successive Approximation Analog-to-Digital Converters: A Survey. ISMVL 2014: 73-78 - 2013
- [c30]Ryo Matsushiba, Hiroaki Kotani, Takao Waho:
An energy-efficient ΔΣ modulator using dynamic-common-source integrators. ECCTD 2013: 1-4 - [c29]Yuki Kurisu, Tatsuya Sasaki, Takao Waho:
A Successive Approximation A/D Converter Using Generalized Non-Binary Algorithm. ISMVL 2013: 152-157 - 2012
- [j9]Kai Blekker, René Richter, Ryosuke Oda, Satoshi Taniyama, Oliver Benner, Gregor Keller, Benjamin Munstermann, Andrey Lysov, Ingo Regolin, Takao Waho, Werner Prost:
InAs Nanowire Circuits Fabricated by Field-Assisted Self-Assembly on a Host Substrate. IEICE Trans. Electron. 95-C(8): 1369-1375 (2012) - [c28]Akinori Moriyama, Satoshi Taniyama, Takao Waho:
A low-distortion switched-source-follower track-and-hold circuit. ICECS 2012: 105-108 - [c27]Hiroaki Kotani, Ryoto Yaguchi, Takao Waho:
Energy Efficiency of Multi-bit delta-sigma Modulators Using Inverter-based Integrators. ISMVL 2012: 203-207 - 2011
- [j8]Ryoto Yaguchi, Fumiyuki Adachi, Takao Waho:
A Dynamic Source-Follower Integrator and Its Application to ΔΣ Modulators. IEICE Trans. Electron. 94-C(5): 802-806 (2011) - [c26]Kazuki Kuribayashi, Kazuya Machida, Yuji Toyama, Takao Waho:
Time-Domain Multi-bit DeltaSigma Analog-to-Digital Converter. ISMVL 2011: 254-258 - 2010
- [c25]Ryoto Yaguchi, Fumiyuki Adachi, Takao Waho:
A low-power delta-sigma modulator using dynamic-source-follower integrators. ICECS 2010: 551-554 - [c24]Tomohiko Ebata, Uichiro Omae, Kazuya Machida, Keita Hoshi, Takao Waho:
Enhancement of comparator operation speed by using negative-differential-resistance devices. ISCAS 2010: 3020-3023 - [c23]Naoki Sugiyama, Hiroshi Noto, Yoshito Nishigami, Ryosuke Oda, Takao Waho:
A Low-Power Successive Approximation Analog-to-Digital Converter Based on 2-Bit/Step Comparison. ISMVL 2010: 325-330
2000 – 2009
- 2009
- [c22]Fumiyuki Adachi, Kazuya Machida, Takao Waho:
A Bandpass Continuous-time SigmaDelta Modulator using a Parallel-DAC to Reduce Jitter Sensitivity. ISCAS 2009: 2261-2264 - [c21]Masaki Murozuka, Kazumasa Ikeura, Fumiyuki Adachi, Kazuya Machida, Takao Waho:
Time-Interleaved Polyphase Decimation Filter Using Signed-Digit Adders. ISMVL 2009: 245-249 - 2008
- [j7]Hiroshi Watanabe, Shunsuke Nakamura, Takao Waho:
A Design of HEMT Comparators for Ultrahigh-Speed A/D Conversion. IEICE Trans. Electron. 91-C(5): 688-692 (2008) - [j6]Takao Waho:
Special Section on Heterostructure Microelectronics with TWHM 2007. IEICE Trans. Electron. 91-C(7): 983 (2008) - [c20]Takao Waho, Hiroki Okuyama, Tomohiko Ebata, Ryousuke Kato:
An ultrahigh-speed full adder using resonant-tunneling logic gates. APCCAS 2008: 1724-1727 - [c19]Kazuki Akutagawa, Kazuya Machida, Takao Waho:
A 3/7-Level Mixed-Mode Algorithmic Analog-to-Digital Converter. ISMVL 2008: 174-179 - 2007
- [j5]Takao Waho:
Special Section on Fundamentals and Applications of Advanced Semiconductor Devices. IEICE Trans. Electron. 90-C(5): 915-916 (2007) - [c18]Shunsuke Nakamura, Uichiro Omae, Hiroshi Watanabe, Takao Waho:
A design of multi-GHz continuous-time bandpass filters using 0.1-μm HEMT technology. ECCTD 2007: 484-487 - [c17]Takao Waho, Akinori Yamada, Hiroki Okuyama, Victor Khorenko, Thai Do, Werner Prost:
A Four-Resonant-Tunneling-Diode (4RTD) NAND/NOR Logic Gate. ISCAS 2007: 129-132 - [c16]Tomoki Tanoue, Munehiko Nagatani, Takao Waho:
A Ternary Analog-to-Digital Converter System. ISMVL 2007: 36 - 2006
- [j4]Keisuke Eguchi, Masaru Chibashi, Shinpei Nakagawa, Mitsuhiro Tanihata, Takao Waho:
A Design of Continuous-Time Delta-Sigma Modulators Using a Fully-Differential Resonant-Tunneling Comparator. IEICE Trans. Electron. 89-C(7): 979-984 (2006) - [c15]Shunsuke Akiyama, Takao Waho:
A 6-bit low-power compact flash ADC using current-mode threshold logic gates. ISCAS 2006 - [c14]Mitsuhiro Tanihata, Takao Waho:
A Feedback-Signal Shaping Technique for Multi-Level Continuous-Time Delta-Sigma Modulators with Clock-Jitter. ISMVL 2006: 20 - 2005
- [j3]Masaru Chibashi, Keisuke Eguchi, Shinpei Nakagawa, Takao Waho:
A fully-differential resonant-tunneling circuit. IEICE Electron. Express 2(7): 221-225 (2005) - [j2]Hideaki Yamada, Takao Waho:
Novel 4RTD Logic Circuits. IEICE Trans. Electron. 88-C(4): 699-704 (2005) - [c13]Naokazu Muramatsu, Hiroshi Okazaki, Takao Waho:
A novel oscillation circuit using a resonant-tunneling diode. ISCAS (3) 2005: 2341-2344 - [c12]Keisuke Eguchi, Masaru Chibashi, Takao Waho:
A Design of 10-GHz Delta-Sigma Modulator using a 4-Level Differential Resonant-Tunneling Quantizer. ISMVL 2005: 43-47 - 2004
- [c11]Ryozo Katoh, Shin-ya Kobayashi, Takao Waho:
A dynamic element matching circuit for multi-bit delta-sigma modulators. ASP-DAC 2004: 569-570 - [c10]Masaru Chibashi, Keisuke Eguchi, Takao Waho:
A novel delta-sigma modulator using resonant-tunneling quantizers. ISCAS (1) 2004: 533-536 - [c9]Yuki Tsuji, Takao Waho:
Multiple-Input Resonant-Tunneling Logic Gates for Flash A/D Converter Applications. ISMVL 2004: 8-13 - 2002
- [c8]Takao Waho, Shin-ya Kobayashi, Koji Matsuura:
An Impact of Introducing Multi-Level Signals to a Bandpass Cascaded Delta-Sigma Modulator. ISMVL 2002: 61-66 - 2001
- [c7]Takao Waho, Kazufumi Hattori, Y. Takamatsu:
Flash Analog-to-Digital Converter Using Resonant-Tunneling Multiple-Valued Circuits. ISMVL 2001: 94-99 - 2000
- [c6]Takao Waho, Kazufumi Hattori, Kouji Honda:
Novel Resonant-Tunneling Multiple-Threshold Logic Circuit Based on Switching Sequence Detection. ISMVL 2000: 317-322
1990 – 1999
- 1999
- [c5]Masafumi Yamamoto, Hideaki Matsuzaki, Toshihiro Itoh, Takao Waho, T. Akeyoshi, J. Osaka:
Ultrahigh-Speed Circuits Using Resonant Tunneling Devices. Great Lakes Symposium on VLSI 1999: 150-153 - 1998
- [j1]Takao Waho, Kevin J. Chen
, Masafumi Yamamoto:
Resonant-tunneling diode and HEMT logic circuits with multiple thresholds and multilevel output. IEEE J. Solid State Circuits 33(2): 268-274 (1998) - [c4]Toshihiro Itoh, Takao Waho, Koichi Maezawa, Masafumi Yamamoto:
Ultrafast Ternary Quantizer using Resonant Tunneling Devices. ISMVL 1998: 13-18 - 1997
- [c3]Takao Waho, Masafumi Yamamoto:
Application of Resonant-Tunneling Quaternary Quantizer to Ultrahigh-Speed A/D Converter. ISMVL 1997: 35-40 - 1996
- [c2]Takao Waho, Kevin J. Chen, Masafumi Yamamoto:
A Literal Gate Using Resonant-Tunneling Devices. ISMVL 1996: 68-73 - 1995
- [c1]Takao Waho:
Resonant Tunneling Transistor and Its Application to Multiple-Valued Logic Circuits. ISMVL 1995: 130-139
Coauthor Index
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last updated on 2024-09-07 00:59 CEST by the dblp team
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