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Marco Donato
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2020 – today
- 2024
- [c16]Zirui Fu
, Aleksandre Avaliani
Heterogeneous Memory Integration and Optimization for Energy-Efficient Multi-Task NLP Edge Inference. ISLPED 2024: 1-6 - 2023
- [j5]Thierry Tambe
A 16-nm SoC for Noise-Robust Speech and NLP Edge AI Inference With Bayesian Sound Source Separation and Attention-Based DNNs. IEEE J. Solid State Circuits 58(2): 569-581 (2023) - [i5]Zirui Fu, Aleksandre Avaliani, Marco Donato:
Energy-efficient Task Adaptation for NLP Edge Inference Leveraging Heterogeneous Memory Architectures. CoRR abs/2303.16100 (2023) - 2022
- [j4]Sae Kyu Lee
SMIV: A 16-nm 25-mm² SoC for IoT With Arm Cortex-A53, eFPGA, and Coherent Accelerators. IEEE J. Solid State Circuits 57(2): 639-650 (2022) - [c15]Lillian Pentecost
NVMExplorer: A Framework for Cross-Stack Comparisons of Embedded Non-Volatile Memories. HPCA 2022: 938-956 - 2021
- [c14]Thierry Tambe, En-Yu Yang, Glenn G. Ko, Yuji Chai, Coleman Hooper, Marco Donato, Paul N. Whatmough, Alexander M. Rush
SM6: A 16nm System-on-Chip for Accurate and Noise-Robust Attention-Based NLP Applications : The 33rd Hot Chips Symposium - August 22-24, 2021. HCS 2021: 1-13 - [c13]Mohammad Mehdi Sharifi
Application-driven Design Exploration for Dense Ferroelectric Embedded Non-volatile Memories. ISLPED 2021: 1-6 - [c12]Thierry Tambe
9.8 A 25mm2 SoC for IoT Devices with 18ms Noise-Robust Speech-to-Text Latency via Bayesian Speech Denoising and Attention-Based Sequence-to-Sequence DNN Speech Recognition in 16nm FinFET. ISSCC 2021: 158-160 - [c11]Thierry Tambe
EdgeBERT: Sentence-Level Energy Optimizations for Latency-Aware Multi-Task NLP Inference. MICRO 2021: 830-844 - [i4]Mohammad Mehdi Sharifi, Lillian Pentecost, Ramin Rajaei, Arman Kazemi, Qiuwen Lou, Gu-Yeon Wei, David Brooks, Kai Ni, X. Sharon Hu, Michael T. Niemier, Marco Donato:
Application-driven Design Exploration for Dense Ferroelectric Embedded Non-volatile Memories. CoRR abs/2106.11757 (2021) - [i3]Lillian Pentecost, Alexander Hankin, Marco Donato, Mark Hempstead, Gu-Yeon Wei, David Brooks:
NVMExplorer: A Framework for Cross-Stack Comparisons of Embedded Non-Volatile Memories. CoRR abs/2109.01188 (2021) - 2020
- [j3]Paul N. Whatmough, Marco Donato, Glenn G. Ko, Sae Kyu Lee, David Brooks, Gu-Yeon Wei:
CHIPKIT: An Agile, Reusable Open-Source Framework for Rapid Test Chip Development. IEEE Micro 40(4): 32-40 (2020) - [c10]Glenn G. Ko, Yuji Chai, Marco Donato, Paul N. Whatmough, Thierry Tambe
A Scalable Bayesian Inference Accelerator for Unsupervised Learning. Hot Chips Symposium 2020: 1-27 - [c9]Glenn G. Ko, Yuji Chai, Marco Donato, Paul N. Whatmough, Thierry Tambe
A 3mm2 Programmable Bayesian Inference Accelerator for Unsupervised Machine Perception using Parallel Gibbs Sampling in 16nm. VLSI Circuits 2020: 1-2 - [i2]Paul N. Whatmough, Marco Donato, Glenn G. Ko, David Brooks, Gu-Yeon Wei:
CHIPKIT: An agile, reusable open-source framework for rapid test chip development. CoRR abs/2001.04504 (2020) - [i1]Thierry Tambe, Coleman Hooper, Lillian Pentecost, En-Yu Yang, Marco Donato, Victor Sanh, Alexander M. Rush, David Brooks, Gu-Yeon Wei:
EdgeBERT: Optimizing On-Chip Inference for Multi-Task NLP. CoRR abs/2011.14203 (2020)
2010 – 2019
- 2019
- [j2]Marco Donato, Lillian Pentecost
MEMTI: Optimizing On-Chip Nonvolatile Storage for Visual Multitask Inference at the Edge. IEEE Micro 39(6): 73-81 (2019) - [c8]Udit Gupta
MASR: A Modular Accelerator for Sparse RNNs. PACT 2019: 1-14 - [c7]Lillian Pentecost
MaxNVM: Maximizing DNN Storage Density and Inference Efficiency with Sparse Encoding and Error Mitigation. MICRO 2019: 769-781 - [c6]Paul N. Whatmough, Sae Kyu Lee, Marco Donato, Hsea-Ching Hsueh, Sam Likun Xi, Udit Gupta
A 16nm 25mm2 SoC with a 54.5x Flexibility-Efficiency Range from Dual-Core Arm Cortex-A53 to eFPGA and Cache-Coherent Accelerators. VLSI Circuits 2019: 34- - 2018
- [j1]Marco Donato
A Sub-Threshold Noise Transient Simulator Based on Integrated Random Telegraph and Thermal Noise Modeling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(3): 643-656 (2018) - [c5]Marco Donato, Brandon Reagen, Lillian Pentecost
On-chip deep neural network storage with multi-level eNVM. DAC 2018: 169:1-169:6 - 2016
- [c4]Marco Donato, R. Iris Bahar
A fast simulator for the analysis of sub-threshold thermal noise transients. DAC 2016: 56:1-56:6 - [c3]Xijing Han, Marco Donato, R. Iris Bahar
Design of Error-Resilient Logic Gates with Reinforcement Using Implications. ACM Great Lakes Symposium on VLSI 2016: 191-196 - 2015
- [c2]Marco Donato, R. Iris Bahar
A Simulation Framework for Analyzing Transient Effects Due to Thermal Noise in Sub-Threshold Circuits. ACM Great Lakes Symposium on VLSI 2015: 45-50 - 2012
- [c1]Marco Donato, Fabio Cremona, Warren Jin, R. Iris Bahar
A noise-immune sub-threshold circuit design based on selective use of Schmitt-trigger logic. ACM Great Lakes Symposium on VLSI 2012: 39-44
Coauthor Index
aka: David M. Brooks
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