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Yanyue Xie
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2020 – today
- 2024
- [c17]Yanyue Xie, Peiyan Dong, Geng Yuan, Zhengang Li, Masoud Zabihi, Chao Wu, Sung-En Chang, Xufeng Zhang, Xue Lin, Caiwen Ding, Nobuyuki Yoshikawa, Olivia Chen, Yanzhi Wang:
SuperFlow: A Fully-Customized RTL-to-GDS Design Automation Flow for Adiabatic Quantum- Flux - Parametron Superconducting Circuits. DATE 2024: 1-6 - [c16]Geng Yang, Yanyue Xie, Zhong Jia Xue, Sung-En Chang, Yanyu Li, Peiyan Dong, Jie Lei, Weiying Xie, Yanzhi Wang, Xue Lin, Zhenman Fang:
SDA: Low-Bit Stable Diffusion Acceleration on Edge FPGAs. FPL 2024: 264-273 - [c15]Zhengang Li
, Alec Lu
Quasar-ViT: Hardware-Oriented Quantization-Aware Architecture Search for Vision Transformers. ICS 2024: 324-337 - [c14]Lei Lu, Yanyue Xie, Wei Jiang, Wei Wang, Xue Lin, Yanzhi Wang:
HybridFlow: Infusing Continuity into Masked Codebook for Extreme Low-Bitrate Image Compression. ACM Multimedia 2024: 3010-3018 - [i8]Lei Lu, Yanyue Xie, Wei Jiang, Wei Wang, Xue Lin, Yanzhi Wang:
HybridFlow: Infusing Continuity into Masked Codebook for Extreme Low-Bitrate Image Compression. CoRR abs/2404.13372 (2024) - [i7]Zhengang Li, Alec Lu, Yanyue Xie, Zhenglun Kong, Mengshu Sun, Hao Tang, Zhong Jia Xue, Peiyan Dong, Caiwen Ding, Yanzhi Wang, Xue Lin, Zhenman Fang:
Quasar-ViT: Hardware-Oriented Quantization-Aware Architecture Search for Vision Transformers. CoRR abs/2407.18175 (2024) - [i6]Yanyue Xie, Peiyan Dong, Geng Yuan, Zhengang Li, Masoud Zabihi, Chao Wu, Sung-En Chang, Xufeng Zhang, Xue Lin, Caiwen Ding, Nobuyuki Yoshikawa, Olivia Chen, Yanzhi Wang:
SuperFlow: A Fully-Customized RTL-to-GDS Design Automation Flow for Adiabatic Quantum-Flux-Parametron Superconducting Circuits. CoRR abs/2407.18209 (2024) - 2023
- [c13]Zhenglun Kong, Haoyu Ma, Geng Yuan, Mengshu Sun, Yanyue Xie, Peiyan Dong, Xin Meng, Xuan Shen, Hao Tang, Minghai Qin, Tianlong Chen, Xiaolong Ma, Xiaohui Xie, Zhangyang Wang, Yanzhi Wang:
Peeling the Onion: Hierarchical Reduction of Data Redundancy for Efficient Vision Transformer Training. AAAI 2023: 8360-8368 - [c12]Zhengang Li, Yanyue Xie, Peiyan Dong, Olivia Chen, Yanzhi Wang:
Invited: Algorithm-Software-Hardware Co-Design for Deep Learning Acceleration. DAC 2023: 1-4 - [c11]Sung-En Chang, Geng Yuan, Alec Lu, Mengshu Sun
ESRU: Extremely Low-Bit and Hardware-Efficient Stochastic Rounding Unit Design for Low-Bit DNN Training. DATE 2023: 1-6 - [c10]Peiyan Dong, Mengshu Sun
HeatViT: Hardware-Efficient Adaptive Token Pruning for Vision Transformers. HPCA 2023: 442-455 - [c9]Dana Diaconu, Yanyue Xie, Mehmet Güngör, Suranga Handagala, Xue Lin, Miriam Leeser:
Machine Learning Across Network-Connected FPGAs. HPEC 2023: 1-7 - [c8]Zhengang Li
SupeRBNN: Randomized Binary Neural Network Using Adiabatic Superconductor Josephson Devices. MICRO 2023: 584-598 - [i5]Masoud Zabihi, Yanyue Xie, Zhengang Li, Peiyan Dong, Geng Yuan, Olivia Chen, Massoud Pedram, Yanzhi Wang:
A Life-Cycle Energy and Inventory Analysis of Adiabatic Quantum-Flux-Parametron Circuits. CoRR abs/2307.12216 (2023) - [i4]Zhengang Li, Geng Yuan, Tomoharu Yamauchi, Masoud Zabihi, Yanyue Xie, Peiyan Dong, Xulong Tang
SupeRBNN: Randomized Binary Neural Network Using Adiabatic Superconductor Josephson Devices. CoRR abs/2309.12212 (2023) - 2022
- [j2]Zhifeng Lin, Yanyue Xie
An Incremental Placement Flow for Advanced FPGAs With Timing Awareness. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(9): 3092-3103 (2022) - [j1]Jianli Chen
Mixed-Cell-Height Placement With Complex Minimum-Implant-Area Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4639-4652 (2022) - [c7]Peiyan Dong, Yanyue Xie, Hongjia Li, Mengshu Sun, Olivia Chen
TAAS: a timing-aware analytical strategy for AQFP-capable placement automation. DAC 2022: 1321-1326 - [c6]Mengshu Sun, Zhengang Li, Alec Lu, Haoyu Ma, Geng Yuan, Yanyue Xie, Hao Tang, Yanyu Li, Miriam Leeser, Zhangyang Wang, Xue Lin, Zhenman Fang:
FPGA-aware automatic acceleration framework for vision transformer with mixed-scheme quantization: late breaking results. DAC 2022: 1394-1395 - [c5]Sung-En Chang, Geng Yuan, Alec Lu, Mengshu Sun, Yanyu Li, Xiaolong Ma, Zhengang Li, Yanyue Xie, Minghai Qin, Xue Lin, Zhenman Fang, Yanzhi Wang:
Hardware-efficient stochastic rounding unit design for DNN training: late breaking results. DAC 2022: 1396-1397 - [c4]Geng Yuan, Sung-En Chang, Qing Jin, Alec Lu, Yanyu Li, Yushu Wu, Zhenglun Kong, Yanyue Xie, Peiyan Dong, Minghai Qin, Xiaolong Ma, Xulong Tang, Zhenman Fang, Yanzhi Wang:
You Already Have It: A Generator-Free Low-Precision DNN Training Framework Using Stochastic Rounding. ECCV (12) 2022: 34-51 - [c3]Zhengang Li, Mengshu Sun
Auto-ViT-Acc: An FPGA-Aware Automatic Acceleration Framework for Vision Transformer with Mixed-Scheme Quantization. FPL 2022: 109-116 - [i3]Zhengang Li, Mengshu Sun, Alec Lu, Haoyu Ma, Geng Yuan, Yanyue Xie, Hao Tang, Yanyu Li, Miriam Leeser, Zhangyang Wang, Xue Lin, Zhenman Fang:
Auto-ViT-Acc: An FPGA-Aware Automatic Acceleration Framework for Vision Transformer with Mixed-Scheme Quantization. CoRR abs/2208.05163 (2022) - [i2]Peiyan Dong, Mengshu Sun, Alec Lu, Yanyue Xie, Kenneth Liu, Zhenglun Kong, Xin Meng, Zhengang Li, Xue Lin, Zhenman Fang, Yanzhi Wang:
HeatViT: Hardware-Efficient Adaptive Token Pruning for Vision Transformers. CoRR abs/2211.08110 (2022) - [i1]Zhenglun Kong, Haoyu Ma, Geng Yuan, Mengshu Sun, Yanyue Xie, Peiyan Dong, Xin Meng, Xuan Shen, Hao Tang, Minghai Qin, Tianlong Chen, Xiaolong Ma, Xiaohui Xie, Zhangyang Wang, Yanzhi Wang:
Peeling the Onion: Hierarchical Reduction of Data Redundancy for Efficient Vision Transformer Training. CoRR abs/2211.10801 (2022) - 2021
- [c2]Zhifeng Lin, Yanyue Xie, Gang Qian, Jianli Chen, Sifei Wang, Jun Yu, Yao-Wen Chang:
Timing-Driven Placement for FPGAs with Heterogeneous Architectures and Clock Constraints. DATE 2021: 1564-1569 - 2020
- [c1]Zhifeng Lin, Yanyue Xie, Gang Qian, Sifei Wang, Jun Yu, Jianli Chen:
Late Breaking Results: An Analytical Timing-Driven Placer for Heterogeneous FPGAs*. DAC 2020: 1-2
Coauthor Index
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