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Jaehun Jeong
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2020 – today
- 2024
- [j7]Jonghyuk Chae
, Jaehun Jeong, Byeongha Park
Precise Individual Illumination Control of Matrix LED With Bypass Gate Driver and 8-Bit PWM. IEEE Trans. Circuits Syst. II Express Briefs 71(11): 4653-4657 (2024) - [c14]Dongchan Jeong, Seungkwon Kim, Seulki Park, Sanghyeon Lee, Sada-Aki Masuoka, Byungha Choi, Shincheol Min, Sanghoon Lee, Minseong Lee, Chang-Woo Sohn, Jaehun Jeong, Yuri Yasuda-Masuoka, Ja-Hum Ku:
Product Performance Aware 3rd Generation GAA Platform Transistor Design with Extreme Small Local Layout Effect and Transistor Variation. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c13]Youngwon Cho, Jaehun Jeong, Jinwook Burm:
A 12-bit 5MS/s Synchronous SAR ADC With Comparator Using High Gain Pre-amplifier. ISOCC 2023: 133-135 - [c12]Jaehun Jeong, Jonghyuk Chae, Seungju Lee, Jinwook Burm:
A Compact Design of SPAD Detector with Quenching Circuit for Reduced Dark Count Rate. ISOCC 2023: 261-262 - [c11]Jonghyuk Chae, Jaehun Jeong, Byeongha Park, Jinwook Burm:
A 8-bit DPWM-based Analog Bypass Circuit and System for LED Matrix Headlamp in High-Voltage 180-nm CMOS Technology. ISOCC 2023: 263-264 - [c10]Jaehun Jeong, Sanghyeon Lee, Sada-Aki Masuoka, Shincheol Min, Sanghoon Lee, Seungkwon Kim, Taehun Myung, Byungha Choi, Chang-Woo Sohn, Sung Won Kim, Jeongmin Choi, Jungmin Park, Hyungjong Lee, Taeyoung Kim, Seokhoon Kim, Yuri Yasuda-Masuoka, Ja-Hum Ku, Gitae Jeong:
World's First GAA 3nm Foundry platform Technology (SF3) with Novel Multi-Bridge-Channel-FET (MBCFET™) Process. VLSI Technology and Circuits 2023: 1-2 - [c9]Kihwang Son, Seulki Park, Kyunghoon Jung, Jun-Gyu Kim
Highly Reliable/Manufacturable 4nm FinFET Platform Technology (SF4X) for HPC Application with Dual-CPP/HP-HD Standard Cells. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c8]Namik Kocaman, Ullas Singh, Bharath Raghavan, Arvindh Iyer, Kumar Thasari, Saurabh Surana, Jun Won Jung, Jaehun Jeong, Heng Zhang, Anand Vasani, Yonghyun Shim, Zhi Huang, Adesh Garg, Hsiang-bin Lee, Bo Wu, Feifei Liu, Ray Wang, Matthew Loh, Alex Wang, Mario Caresosa, Bo Zhang, Afshin Momtaz:
An 182mW 1-60Gb/s Configurable PAM-4/NRZ Transceiver for Large Scale ASIC Integration in 7nm FinFET Technology. ISSCC 2022: 120-122 - 2020
- [c7]Michael P. Flynn, Jaehun Jeong, Sunmin Jang, Hyungil Chae, Daniel Weyer, Rundao Lu, John Bell:
Continuous-Time Bandpass Delta-Sigma Modulators and Bitstream Processing: (Invited). CICC 2020: 1-8 - [c6]Young-Duk Kim, Wookyeong Jeong, Lakkyung Jung, Dongsuk Shin, Jae Geun Song, Jinook Song, Hyeokman Kwon, Jaeyoung Lee, Jaesu Jung, Myungjin Kang, Jaehun Jeong, Yoonjoo Kwon, Nak Hee Seong:
2.4 A 7nm High-Performance and Energy-Efficient Mobile Application Processor with Tri-Cluster CPUs and a Sparsity-Aware NPU. ISSCC 2020: 48-50
2010 – 2019
- 2019
- [j6]Sunmin Jang
A 1-GHz 16-Element Four-Beam True-Time-Delay Digital Beamformer. IEEE J. Solid State Circuits 54(5): 1304-1314 (2019) - 2018
- [j5]Sunmin Jang
A 16-Element 4-Beam 1 GHz IF 100 MHz Bandwidth Interleaved Bit Stream Digital Beamformer in 40 nm CMOS. IEEE J. Solid State Circuits 53(5): 1302-1312 (2018) - 2017
- [j4]Jaehun Jeong, Yusung Kim, Chang Wook Ahn
A multi-objective evolutionary approach to automatic melody generation. Expert Syst. Appl. 90: 50-61 (2017) - 2016
- [j3]Jaehun Jeong, Nicholas Collins, Michael P. Flynn:
A 260 MHz IF Sampling Bit-Stream Processing Digital Beamformer With an Integrated Array of Continuous-Time Band-Pass ΔΣ Modulators. IEEE J. Solid State Circuits 51(5): 1168-1176 (2016) - [c5]Tae Jong Choi, Jaehun Jeong, Chang Wook Ahn
A Multi-agent System for Creating Art Based on Boids with Evolutionary and Neural Networks. BIC-TA (1) 2016: 518-523 - 2015
- [c4]Irshad Ahmad Ansari
PSO Optimized Multipurpose Image Watermarking Using SVD and Chaotic Sequence. BIC-TA 2015: 1-17 - [c3]Jaehun Jeong, Chang Wook Ahn
An Evolutionary Approach to Generate Rhythm and Melody Based on Repertories. BIC-TA 2015: 181-199 - 2014
- [j2]Hyungil Chae, Jaehun Jeong, Gabriele Manganaro
A 12 mW Low Power Continuous-Time Bandpass ΔΣ Modulator With 58 dB SNDR and 24 MHz Bandwidth at 200 MHz IF. IEEE J. Solid State Circuits 49(2): 405-415 (2014) - [j1]Hyo-Gyuem Rhew, Jaehun Jeong, Jeffrey A. Fredenburg, Sunjay Dodani, Parag G. Patil, Michael P. Flynn:
A Fully Self-Contained Logarithmic Closed-Loop Deep Brain Stimulation SoC With Wireless Telemetry and Wireless Power Management. IEEE J. Solid State Circuits 49(10): 2213-2227 (2014) - 2012
- [c2]Hyungil Chae, Jaehun Jeong, Gabriele Manganaro
A 12mW low-power continuous-time bandpass ΔΣ modulator with 58dB SNDR and 24MHz bandwidth at 200MHz IF. ISSCC 2012: 148-150 - [c1]Hyo-Gyuem Rhew, Jaehun Jeong, Jeffrey A. Fredenburg, Sunjay Dodani, Parag G. Patil, Michael P. Flynn:
A wirelessly powered log-based closed-loop deep brain stimulation SoC with two-way wireless telemetry for treatment of neurological disorders. VLSIC 2012: 70-71
Coauthor Index
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