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Saleh Abdel-Hafeez
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2020 – today
- 2024
- [j14]Saleh Abdel-Hafeez
:
A fast and cost-effective integer restoring division hardware. Comput. Electr. Eng. 116: 109221 (2024) - 2023
- [j13]Saleh Abdel-Hafeez
Programmable Feedback Shift Register. Circuits Syst. Signal Process. 42(8): 4784-4808 (2023) - [j12]Saleh Abdel-Hafeez
A novel self-timing CMOS first-edge take-all circuit for on-chip communication systems. IET Comput. Digit. Tech. 17(3-4): 141-148 (2023) - 2022
- [j11]Saleh Abdel-Hafeez
Design of memory Alias Table based on the SRAM 8T-Cell. Int. J. Circuit Theory Appl. 50(8): 2913-2931 (2022) - 2021
- [j10]Saleh Abdel-Hafeez
Reconfigurable FIFO memory circuit for synchronous and asynchronous communication. Int. J. Circuit Theory Appl. 49(4): 938-952 (2021)
2010 – 2019
- 2019
- [c5]Ann Gordon-Ross, Saleh Abdel-Hafeez, Mohamad Hammam Alsafrjalani:
A One-Cycle FIFO Buffer for Memory Management Units in Manycore Systems. ISVLSI 2019: 265-270 - 2018
- [j9]Saleh Abdel-Hafeez, Ali M. Shatnawi:
High-Speed Low-Power Flash ADC Architecture Using Switched-Capacitor Positive Feedback Comparator and Parallel Single-Gate Encoder. Circuits Syst. Signal Process. 37(6): 2492-2510 (2018) - [j8]Saleh Abdel-Hafeez, Ann Gordon-Ross, Samer Abubaker:
A comparison-free sorting algorithm on CPUs and GPUs. J. Supercomput. 74(11): 6369-6400 (2018) - 2017
- [j7]Saleh Abdel-Hafeez, Ann Gordon-Ross
An Efficient O(N) Comparison-Free Sorting Algorithm. IEEE Trans. Very Large Scale Integr. Syst. 25(6): 1930-1942 (2017) - 2013
- [j6]Saleh Abdel-Hafeez, Ann Gordon-Ross, Behrooz Parhami:
Scalable Digital CMOS Comparator Using a Parallel Prefix Tree. IEEE Trans. Very Large Scale Integr. Syst. 21(11): 1989-1998 (2013) - 2012
- [c4]Saleh Abdel-Hafeez, Mohammad Shatnawi
A double data rate 8T-cell SRAM architecture for systems-on-chip. ISSoC 2012: 1-4 - 2011
- [j5]Saleh Abdel-Hafeez, Ann Gordon-Ross:
A Gigahertz Digital CMOS Divide-by-N Frequency Divider Based on a State Look-Ahead Structure. Circuits Syst. Signal Process. 30(6): 1549-1572 (2011) - [j4]Saleh Abdel-Hafeez, Ann Gordon-Ross, Asem Albosul, Ahmad Shatnawi, Shadi M. Harb:
A Shadow Dynamic Finite State Machine for Branch Prediction: An Alternative for the 2-bit Saturating Counter. Informatica (Slovenia) 35(2): 211-219 (2011) - [j3]Saleh Abdel-Hafeez, Ann Gordon-Ross:
A Digital CMOS Parallel Counter Architecture Based on State Look-Ahead Logic. IEEE Trans. Very Large Scale Integr. Syst. 19(6): 1023-1033 (2011)
2000 – 2009
- 2008
- [j2]Saleh Abdel-Hafeez, Anas S. Matalkah:
CMOS Eight-Transistor Memory Cell for Low-Dynamic-Power High-Speed Embedded SRAM. J. Circuits Syst. Comput. 17(5): 845-863 (2008) - [c3]Saleh Abdel-Hafeez, Shadi M. Harb, William R. Eisenstadt
High speed digital CMOS divide-by-N fequency divider. ISCAS 2008: 592-595 - 2007
- [c2]Saleh Abdel-Hafeez, Shadi M. Harb, William R. Eisenstadt
Low-Power Content Addressable Memory With Read/Write and Matched Mask Ports. PATMOS 2007: 75-85 - [c1]Saleh Abdel-Hafeez, Shadi M. Harb, William R. Eisenstadt
A low-power CAM using a 12-transistor design cell. VLSI-SoC 2007: 264-269 - 2006
- [j1]Saleh Abdel-Hafeez, Shadi M. Harb:
A VLSI High-Performance Priority Encoder Using Standard CMOS Library. IEEE Trans. Circuits Syst. II Express Briefs 53-II(8): 597-601 (2006)
Coauthor Index
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