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Ramzi A. Jaber
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2020 – today
- 2022
- [i1]Ramzi A. Jaber, Lina A. Nimri, Ali M. Haidar:
Multiple-Valued Logic Circuit Design and Data Transmission Intended for Embedded Systems. CoRR abs/2211.04542 (2022) - 2021
- [j4]Jihad Mohamad Al Ja'am
, Ramzi A. Jaber
Novel Ternary Adder and Multiplier Designs Without Using Decoders or Encoders. IEEE Access 9: 56726-56735 (2021) - [j3]Ramzi A. Jaber
Ultra-Low Energy CNFET-Based Ternary Combinational Circuits Designs. IEEE Access 9: 115951-115961 (2021) - 2020
- [j2]Ramzi A. Jaber
CNFET-based designs of Ternary Half-Adder using a novel "decoder-less" ternary multiplexer based on unary operators. Microelectron. J. 96: 104698 (2020) - [c4]Ramzi A. Jaber
CNTFET-Based Design of Ternary Multiplier using Only Multiplexers. ICM 2020: 1-4 - [c3]Ramzi A. Jaber
A Novel CNFET-Based Ternary to Binary Converter Design in Data Transmission. ICM 2020: 1-4
2010 – 2019
- 2019
- [j1]Ramzi A. Jaber
High-Performance and Energy-Efficient CNFET-Based Designs for Ternary Logic Circuits. IEEE Access 7: 93871-93886 (2019) - [c2]Ramzi A. Jaber
A Novel Binary to Ternary Converter using Double Pass-Transistor Logic. ICM 2019: 240-243 - 2018
- [c1]Ramzi A. Jaber
A Novel Implementation of Ternary Decoder Using CMOS DPL Binary Gates. ACIT 2018: 1-3
Coauthor Index
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