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Aditya Narayan
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2020 – today
- 2022
- [j3]Aditya Narayan
, Yvain Thonnart
Architecting Optically Controlled Phase Change Memory. ACM Trans. Archit. Code Optim. 19(4): 48:1-48:26 (2022) - 2021
- [b1]Aditya Narayan:
Energy-efficient architectures for chip-scale networks and memory systems using silicon-photonics technology. Boston University, USA, 2021 - [j2]Aditya Narayan
PROWAVES: Proactive Runtime Wavelength Selection for Energy-Efficient Photonic NoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(10): 2156-2169 (2021) - [i1]Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ayse K. Coskun, Ajay Joshi:
Architecting Optically-Controlled Phase Change Memory. CoRR abs/2107.11516 (2021) - 2020
- [j1]Ayse K. Coskun
Cross-Layer Co-Optimization of Network Design and Chiplet Placement in 2.5-D Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 5183-5196 (2020) - [c5]Aditya Narayan
System-level Evaluation of Chip-Scale Silicon Photonic Networks for Emerging Data-Intensive Applications. DATE 2020: 1444-1449 - [c4]Yvain Thonnart
POPSTAR: a Robust Modular Optical NoC Architecture for Chiplet-based 3D Integrated Systems. DATE 2020: 1456-1461 - [c3]Aditya Narayan
Bandwidth Allocation in Silicon-Photonic Networks Using Application Instrumentation. HPEC 2020: 1-2
2010 – 2019
- 2019
- [c2]Aditya Narayan
WAVES: Wavelength Selection for Power-Efficient 2.5D-Integrated Photonic NoCs. DATE 2019: 516-521 - 2018
- [c1]Aditya Narayan
MOCA: Memory Object Classification and Allocation in Heterogeneous Memory Systems. IPDPS 2018: 326-335
Coauthor Index
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