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Shubham Rai
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2020 – today
- 2024
- [j10]Armin Darjani
, Nima Kavand
Thwarting GNN-Based Attacks Against Logic Locking. IEEE Trans. Inf. Forensics Secur. 19: 7200-7215 (2024) - [c30]Yannick Braatz, Taha Soliman, Shubham Rai
CoNAX: Towards Comprehensive Co-Design Neural Architecture Search Using HW Abstractions. ASAP 2024: 8-16 - [c29]Shubham Rai, Cecilia De la Parra, Martin Rapp, Jan Micha Borrmann, Nina Bretz, Stefan Metzlaff, Taha Soliman, Christoph Schorn:
Accelerating Automated Driving and ADAS Using HW/SW Codesign. SOCC 2024: 1-6 - 2023
- [j9]Yuhao Liu
High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers. IEEE Embed. Syst. Lett. 15(4): 194-197 (2023) - [j8]Shubham Rai
Utilizing XMG-Based Synthesis to Preserve Self-Duality for RFET-Based Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(3): 914-927 (2023) - [j7]Nima Kavand
Design of Energy-Efficient RFET-Based Exact and Approximate 4:2 Compressors and Multipliers. IEEE Trans. Circuits Syst. II Express Briefs 70(9): 3644-3648 (2023) - [c28]Armin Darjani, Nima Kavand, Shubham Rai
Discerning Limitations of GNN-based Attacks on Logic Locking. DAC 2023: 1-6 - [c27]Jens Trommer
Design Enablement Flow for Circuits with Inherent Obfuscation based on Reconfigurable Transistors. DATE 2023: 1-6 - [c26]Yuhao Liu
NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs. IPDPS Workshops 2023: 85-92 - [c25]Raghul Saravanan, Sathwika Bavikadi, Shubham Rai
Reconfigurable FET Approximate Computing-based Accelerator for Deep Learning Applications. ISCAS 2023: 1-5 - [c24]Steffen Märcker, Michael Raitza, Shubham Rai
Formal Analysis of Camouflaged Reconfigurable Circuits. NEWCAS 2023: 1-5 - 2022
- [j6]Aditya Lohana
Efficient Privacy-Aware Federated Learning by Elimination of Downstream Redundancy. IEEE Des. Test 39(3): 73-81 (2022) - [j5]Shubham Rai
Security Promises and Vulnerabilities in Emerging Reconfigurable Nanotechnology-Based Circuits. IEEE Trans. Emerg. Top. Comput. 10(2): 763-778 (2022) - [c23]Alessandro Tempia Calvino
A Versatile Mapping Approach for Technology Mapping and Graph Optimization. ASP-DAC 2022: 410-416 - [c22]Nishant Gupta
DELTA: DEsigning a stealthy trigger mechanism for analog hardware trojans and its detection analysis. DAC 2022: 787-792 - [c21]Michael Raitza, Steffen Märcker, Shubham Rai
Exploring Standard-Cell Designs for Reconfigurable Nanotechnologies: A Formal Approach. DATE 2022: 23-28 - [c20]Martin Thümmler, Shubham Rai
Improving Technology Mapping for And-Inverter-Cones. DATE 2022: 274-279 - [c19]Yuhao Liu
NetPU: Prototyping a Generic Reconfigurable Neural Network Accelerator Architecture. FPT 2022: 1 - [c18]Armin Darjani, Nima Kavand, Shubham Rai
ENTANGLE: An Enhanced Logic-locking Technique for Thwarting SAT and Structural Attacks. ACM Great Lakes Symposium on VLSI 2022: 147-151 - [c17]Nima Kavand, Armin Darjani, Shubham Rai
Securing Hardware through Reconfigurable Nano-Structures. ICCAD 2022: 130:1-130:7 - [c16]Nikhil Rangarajan, Satwik Patnaik
SCRAMBLE: A Secure and Configurable, Memristor-Based Neuromorphic Hardware Leveraging 3D Architecture. ISVLSI 2022: 308-313 - 2021
- [j4]Shubham Rai
A Survey of FPGA Logic Cell Designs in the Light of Emerging Technologies. IEEE Access 9: 91564-91574 (2021) - [j3]Gopal Raut
RECON: Resource-Efficient CORDIC-Based Neuron Architecture. IEEE Open J. Circuits Syst. 2: 170-181 (2021) - [j2]Gopal Raut
Correction to "RECON: Resource-Efficient CORDIC-Based Neuron Architecture". IEEE Open J. Circuits Syst. 2: 292 (2021) - [c15]Shubham Rai
Preserving Self-Duality During Logic Synthesis for Emerging Reconfigurable Nanotechnologies. DATE 2021: 354-359 - [c14]Shubham Rai
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. DATE 2021: 1026-1031 - [c13]Shubham Rai
Vertical IP Protection of the Next-Generation Devices: Quo Vadis? DATE 2021: 1905-1914 - [c12]Shubham Rai
Perspectives on Emerging Computation-in-Memory Paradigms. DATE 2021: 1925-1934 - [c11]Andreas Krinke
Exploring Physical Synthesis for Circuits based on Emerging Reconfigurable Nanotechnologies. ICCAD 2021: 1-9 - [c10]Yasasvi V. Peruvemba, Shubham Rai, Kapil Ahuja, Akash Kumar:
RL-Guided Runtime-Constrained Heuristic Exploration for Logic Synthesis. ICCAD 2021: 1-9 - [c9]Abhiroop Bhattacharjee, Shubham Rai
Metastability with Emerging Reconfigurable Transistors: Exploiting Ambipolarity for Throughput. VLSI-SoC 2021: 1-6 - [c8]Shubham Rai
END-TRUE: Emerging Nanotechnology-Based Double-Throughput True Random Number Generator. VLSI-SoC (Selected Papers) 2021: 175-203 - 2020
- [c7]Shubham Rai
DiSCERN: Distilling Standard-Cells for Emerging Reconfigurable Nanotechnologies. DATE 2020: 674-677 - [c6]Gopal Raut
A CORDIC Based Configurable Activation Function for ANN Applications. ISVLSI 2020: 78-83 - [i1]Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa Jr., Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. CoRR abs/2012.02530 (2020)
2010 – 2019
- 2019
- [j1]Shubham Rai
Designing Efficient Circuits Based on Runtime-Reconfigurable Field-Effect Transistors. IEEE Trans. Very Large Scale Integr. Syst. 27(3): 560-572 (2019) - [c5]Ansh Rupani, Shubham Rai
Exploiting Emerging Reconfigurable Technologies for Secure Devices. DSD 2019: 668-671 - [c4]Shubham Rai
Hardware Watermarking Using Polymorphic Inverter Designs Based On Reconfigurable Nanotechnologies. ISVLSI 2019: 663-669 - 2018
- [c3]Shubham Rai
A physical synthesis flow for early technology evaluation of silicon nanowire based reconfigurable FETs. DATE 2018: 605-608 - [c2]Shubham Rai
Technology mapping flow for emerging reconfigurable silicon nanowire transistors. DATE 2018: 767-772 - [c1]Shubham Rai
Emerging reconfigurable nanotechnologies: can they support future electronics? ICCAD 2018: 13
Coauthor Index
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last updated on 2024-11-20 20:56 CET by the dblp team
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