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Tomás Benes
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2020 – today
- 2023
- [c9]Tomás Benes, Jaroslav Pesek
, Tomás Cejka:
Look at my Network: An Insight into the ISP Backbone Traffic. CNSM 2023: 1-7 - 2022
- [c8]Tomás Benes, Sven Ubik, Jakub Halák:
Packet Reordering Correction for Low-Latency Network Applications. MECO 2022: 1-5 - 2021
- [c7]Michal Orsák, Tomás Benes:
High-speed stateful packet classifier based on TSS algorithm optimized for off-chip memories. DDECS 2021: 151-156 - 2020
- [j1]Matej Bartík
An In-Sight Into How Compression Dictionary Architecture Can Affect the Overall Performance in FPGAs. IEEE Access 8: 183101-183116 (2020) - [c6]Tomás Benes, Michal Kekely, Karel Hynek, Tomás Cejka
Pipelined ALU for effective external memory access in FPGA. DSD 2020: 97-100 - [c5]Karel Hynek, Tomás Benes, Tomás Cejka
Refined Detection of SSH Brute-Force Attackers Using Machine Learning. SEC 2020: 49-63
2010 – 2019
- 2019
- [c4]Matej Bartik
Design of a High-Throughput Match Search Unit for Lossless Compression Algorithms. CCWC 2019: 732-738 - [c3]Karel Hynek
Ultra High Resolution Jitter Measurement Method for Ethernet Based Networks. CCWC 2019: 847-851 - [c2]Tomás Benes, Matej Bartík, Pavel Kubalík:
High Throughput and Low Latency LZ4 Compressor on FPGA. ReConFig 2019: 1-5 - 2018
- [c1]Matej Bartík, Sven Ubik, Pavel Kubalík, Tomás Benes:
Performance Comparison of Multiple Approaches of Status Register for Medium Density Memory Suitable for Implementation of a Lossless Compression Dictionary: (Abstract Only). FPGA 2018: 290
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last updated on 2024-04-25 05:51 CEST by the dblp team
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