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Alfio Di Mauro
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- affiliation: ETH Zürich, Switzerland
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2020 – today
- 2024
- [j9]Francesco Conti
, Gianna Paulin
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2-8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing. IEEE J. Solid State Circuits 59(1): 128-142 (2024) - [j8]Arpan Suravi Prasad
Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine. IEEE J. Solid State Circuits 59(7): 2055-2069 (2024) - [c21]Simone Manoni
NARS: Neuromorphic Acceleration through Register-Streaming Extensions on RISC-V Cores. CF (Companion) 2024 - [i15]Viviane Potocnik, Alfio Di Mauro, Lorenzo Lamberti, Victor Javier Kartsch, Moritz Scherer, Francesco Conti, Luca Benini:
Circuits and Systems for Embodied AI: Exploring uJ Multi-Modal Perception for Nano-UAVs on the Kraken Shield. CoRR abs/2410.09054 (2024) - 2023
- [j7]Luca Zanatta
Directly-trained Spiking Neural Networks for Deep Reinforcement Learning: Energy efficient implementation of event-based obstacle avoidance on a neuromorphic accelerator. Neurocomputing 562: 126885 (2023) - [j6]Moritz Scherer
TCN-CUTIE: A 1, 036-TOp/s/W, 2.72-µJ/Inference, 12.2-mW All-Digital Ternary Accelerator in 22-nm FDX Technology. IEEE Micro 43(1): 42-48 (2023) - [j5]Gianmarco Ottavi
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode. IEEE Trans. Circuits Syst. I Regul. Pap. 70(6): 2450-2463 (2023) - [c20]Amélie Gruel, Alfio Di Mauro, Robin Hunziker, Luca Benini, Jean Martinet, Michele Magno:
Embedded neuromorphic attention model leveraging a novel low-power heterogeneous platform. AICAS 2023: 1-5 - [c19]Moritz Scherer, Manuel Eggimann, Alfio Di Mauro, Arpan Suravi Prasad, Francesco Conti, Davide Rossi, Jorge Tomás Gómez, Ziyun Li, Syed Shakib Sarwar, Zhao Wang, Barbara De Salvo, Luca Benini:
Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS. ESSCIRC 2023: 217-220 - [c18]Georg Rutishauser, Robin Hunziker, Alfio Di Mauro, Sizhen Bian
ColibriES: A Milliwatts RISC-V Based Embedded System Leveraging Neuromorphic and Neural Networks Hardware Accelerators for Low-Latency Closed-loop Control Applications. ISCAS 2023: 1-5 - [c17]Francesco Conti, Davide Rossi, Gianna Paulin
A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing. ISSCC 2023: 326-327 - [c16]Sizhen Bian
ColibriUAV: An Ultra-Fast, Energy-Efficient Neuromorphic Edge Processing UAV-Platform with Event-Based and Frame-Based Cameras. IWASI 2023: 287-292 - [i14]Georg Rutishauser, Robin Hunziker, Alfio Di Mauro, Sizhen Bian, Luca Benini, Michele Magno:
ColibriES: A Milliwatts RISC-V Based Embedded System Leveraging Neuromorphic and Neural Networks Hardware Accelerators for Low-Latency Closed-loop Control Applications. CoRR abs/2302.07957 (2023) - [i13]Francesco Conti, Gianna Paulin, Davide Rossi, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Luca Benini:
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing. CoRR abs/2305.08415 (2023) - [i12]Sizhen Bian, Lukas Schulthess, Georg Rutishauser, Alfio Di Mauro, Luca Benini, Michele Magno:
ColibriUAV: An Ultra-Fast, Energy-Efficient Neuromorphic Edge Processing UAV-Platform with Event-Based and Frame-Based Cameras. CoRR abs/2305.18371 (2023) - [i11]Arpan Suravi Prasad, Moritz Scherer, Francesco Conti, Davide Rossi, Alfio Di Mauro, Manuel Eggimann, Jorge Tomás Gómez, Ziyun Li, Syed Shakib Sarwar, Zhao Wang, Barbara De Salvo, Luca Benini:
Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality with At-MRAM Neural Engine. CoRR abs/2312.14750 (2023) - 2022
- [j4]Davide Rossi
Vega: A Ten-Core SoC for IoT Endnodes With DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode. IEEE J. Solid State Circuits 57(1): 127-139 (2022) - [c15]Jiawei Liao, Lars Widmer, Xiaying Wang
An Energy-Efficient Spiking Neural Network for Finger Velocity Decoding for Implantable Brain-Machine Interface. AICAS 2022: 134-137 - [c14]Moritz Scherer, Alfio Di Mauro, Georg Rutishauser, Tim Fischer, Luca Benini:
A 1036 TOp/s/W, 12.2 mW, 2.72 μJ/Inference All Digital TNN Accelerator in 22 nm FDX Technology for TinyML Applications. COOL CHIPS 2022: 1-3 - [c13]Alfio Di Mauro, Arpan Suravi Prasad, Zhikai Huang
SNE: an Energy-Proportional Digital Accelerator for Sparse Event-Based Convolutions. DATE 2022: 825-830 - [c12]Alfio Di Mauro, Moritz Scherer, Davide Rossi, Luca Benini:
Kraken: A Direct Event/Frame-Based Multi-sensor Fusion SoC for Ultra-Efficient Visual Processing in Nano-UAVs. HCS 2022: 1-19 - [i10]Gianmarco Ottavi, Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Alfio Di Mauro, Luca Benini, Davide Rossi:
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode. CoRR abs/2201.08656 (2022) - [i9]Alfio Di Mauro, Arpan Suravi Prasad, Zhikai Huang, Matteo Spallanzani, Francesco Conti, Luca Benini:
SNE: an Energy-Proportional Digital Accelerator for Sparse Event-Based Convolutions. CoRR abs/2204.10687 (2022) - [i8]Alfio Di Mauro, Moritz Scherer, Davide Rossi, Luca Benini:
Kraken: A Direct Event/Frame-Based Multi-sensor Fusion SoC for Ultra-Efficient Visual Processing in Nano-UAVs. CoRR abs/2209.01065 (2022) - [i7]Jiawei Liao, Lars Widmer, Xiaying Wang, Alfio Di Mauro, Samuel R. Nason-Tomaszewski, Cynthia A. Chestek, Luca Benini, Taekwang Jang:
An Energy-Efficient Spiking Neural Network for Finger Velocity Decoding for Implantable Brain-Machine Interface. CoRR abs/2210.06287 (2022) - [i6]Moritz Scherer, Alfio Di Mauro, Tim Fischer, Georg Rutishauser, Luca Benini:
TCN-CUTIE: A 1036 TOp/s/W, 2.72 uJ/Inference, 12.2 mW All-Digital Ternary Accelerator in 22 nm FDX Technology. CoRR abs/2212.00688 (2022) - 2021
- [j3]Pasquale Davide Schiavone
Arnold: An eFPGA-Augmented RISC-V SoC for Flexible and Low-Power IoT End Nodes. IEEE Trans. Very Large Scale Integr. Syst. 29(4): 677-690 (2021) - [c11]Alfio Di Mauro, Moritz Scherer, Jordi Fornt Mas
FlyDVS: An Event-Driven Wireless Ultra-Low Power Visual Sensor Node. DATE 2021: 1851-1854 - [c10]Angelo Garofalo, Gianmarco Ottavi, Alfio Di Mauro, Francesco Conti, Giuseppe Tagliavini, Luca Benini, Davide Rossi:
A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode. ESSCIRC 2021: 267-270 - [c9]Moritz Scherer, Philipp Mayer
Towards Always-on Event-based Cameras for Long-lasting Battery-operated Smart Sensor Nodes. I2MTC 2021: 1-6 - [c8]Davide Rossi, Francesco Conti, Manuel Eggimann, Stefan Mach, Alfio Di Mauro, Marco Guermandi, Giuseppe Tagliavini, Antonio Pullini, Igor Loi, Jie Chen, Eric Flamand, Luca Benini:
4.4 A 1.3TOPS/W @ 32GOPS Fully Integrated 10-Core SoC for IoT End-Nodes with 1.7μW Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode. ISSCC 2021: 60-62 - [i5]Davide Rossi, Francesco Conti, Manuel Eggimann, Alfio Di Mauro, Giuseppe Tagliavini, Stefan Mach, Marco Guermandi, Antonio Pullini, Igor Loi, Jie Chen, Eric Flamand, Luca Benini:
Vega: A 10-Core SoC for IoT End-Nodes with DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode. CoRR abs/2110.09101 (2021) - 2020
- [j2]Alfio Di Mauro, Davide Rossi
Performance-aware predictive-model-based on-chip body-bias regulation strategy for an ULP multi-core cluster in 28 nm UTBB FD-SOI. Integr. 72: 194-207 (2020) - [j1]Alfio Di Mauro
Always-On 674μ W@4GOP/s Error Resilient Binary Neural Networks With Aggressive SRAM Voltage Scaling on a 22-nm IoT End-Node. IEEE Trans. Circuits Syst. 67-I(11): 3905-3918 (2020) - [c7]Alfio Di Mauro, Florian Zaruba, Fabian Schuiki, Stefan Mach, Luca Benini:
Live Demonstration: Exploiting Body-Biasing for Static Corner Trimming and Maximum Energy Efficiency Operation in 22nm FDX Technology. ISCAS 2020: 1 - [c6]Hayate Okuhara, Ahmed Elnaqib, Davide Rossi, Alfio Di Mauro, Philipp Mayer
An Energy-Efficient Low-Voltage Swing Transceiver for mW-Range IoT End-Nodes. ISCAS 2020: 1-5 - [c5]Michael Hersche
Integrating event-based dynamic vision sensors with sparse hyperdimensional computing: a low-power accelerator with online learning capability. ISLPED 2020: 169-174 - [i4]Pasquale Davide Schiavone, Davide Rossi, Alfio Di Mauro, Frank K. Gürkaynak, Timothy Saxe, Mao Wang, Ket Chong Yap, Luca Benini:
Arnold: an eFPGA-Augmented RISC-V SoC for Flexible and Low-Power IoT End-Nodes. CoRR abs/2006.14256 (2020) - [i3]Alfio Di Mauro, Francesco Conti, Pasquale Davide Schiavone, Davide Rossi, Luca Benini:
Always-On 674uW @ 4GOP/s Error Resilient Binary Neural Networks with Aggressive SRAM Voltage Scaling on a 22nm IoT End-Node. CoRR abs/2007.08952 (2020) - [i2]Alfio Di Mauro, Davide Rossi, Antonio Pullini, Philippe Flatresse, Luca Benini:
Performance-Aware Predictive-Model-Based On-Chip Body-Bias Regulation Strategy for an ULP Multi-Core Cluster in 28nm UTBB FD-SOI. CoRR abs/2007.13667 (2020) - [i1]Hayate Okuhara, Ahmed Elnaqib, Davide Rossi, Alfio Di Mauro, Philipp Mayer, Pierpaolo Palestri, Luca Benini:
An Energy-Efficient Low-Voltage Swing Transceiver for mW-Range IoT End-Nodes. CoRR abs/2010.04566 (2020)
2010 – 2019
- 2018
- [c4]Antonio Pullini, Davide Rossi, Igor Loi, Alfio Di Mauro, Luca Benini
Mr. Wolf: A 1 GFLOP/s Energy-Proportional Parallel Ultra Low Power SoC for IOT Edge Processing. ESSCIRC 2018: 274-277 - [c3]Alfio Di Mauro, Davide Rossi, Antonio Pullini, Philippe Flatresse, Luca Benini
Live Demonstration: Body-Bias Based Performance Monitoring and Compensation for a Near-Threshold Multi-Core Cluster in 28nm FD-SOI Technology. ISCAS 2018: 1- - 2017
- [c2]Alfio Di Mauro, Francesco Conti, Luca Benini
An Ultra-Low Power Address-Event Sensor Interface for Energy-Proportional Time-to-Information Extraction. DAC 2017: 75:1-75:6 - [c1]Alfio Di Mauro, Davide Rossi, Antonio Pullini, Philippe Flatresse, Luca Benini:
Temperature and process-aware performance monitoring and compensation for an ULP multi-core cluster in 28nm UTBB FD-SOI technology. PATMOS 2017: 1-8
Coauthor Index
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