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Adam Chou
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2020 – today
- 2023
- [c6]Mayank Raj, Chuan Xie, Ade Bekele, Adam Chou, Wenfeng Zhang, Ying Cao, Jae Wook Kim, Nakul Narang, Hongyuan Zhao, Yipeng Wang, Kee Hian Tan, Winson Lin, Jay Im, David Mahashin, Santiago Asuncion, Parag Upadhyaya, Yohan Frans:
A O.96pJ/b 7 × 50Gb/s-per-Fiber WDM Receiver with Stacked 7nm CMOS and 45nm Silicon Photonic Dies. ISSCC 2023: 204-205 - 2021
- [j3]Jay Im
, Kevin Zheng, Chuen-Huei Adam Chou, Lei Zhou, Jae Wook Kim, Stanley Chen, Yipeng Wang, Hao-Wei Hung, Kee Hian Tan, Winson Lin, Arianne Roldan, Declan Carey
A 112-Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR ADC and Inverter-Based RX Analog Front-End in 7-nm FinFET. IEEE J. Solid State Circuits 56(1): 7-18 (2021) - 2020
- [c5]Jay Im, Kevin Zheng, Adam Chou, Lei Zhou, Jae Wook Kim, Stanley Chen, Yipeng Wang, Hao-Wei Hung, Kee Hian Tan, Winson Lin, Arianne Roldan, Declan Carey, Ilias Chlis, Ronan Casey, Ade Bekele, Ying Cao, David Mahashin, Hong Ahn, Hongtao Zhang, Yohan Frans, Ken Chang:
6.1 A 112Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR-ADC and Inverter-Based RX Analog Front-End in 7nm FinFET. ISSCC 2020: 116-118
2010 – 2019
- 2018
- [c4]Jay Im, Stanley Chen, Dave Freitas, Adam Chou, Lei Zhou, Ian Zhuang, Tim Cronin, David Mahashin, Winson Lin, Kok Lim Chan, Hongyuan Zhao, Kee Hian Tan, Ade Bekele, Didem Turker, Parag Upadhyaya, Yohan Frans, Ken Chang:
A 0.5-28GB/S Wireline Tranceiver with 15-Tap DFE and Fast-Locking Digital CDR in 7NM FinFET. VLSI Circuits 2018: 145-146 - 2017
- [j2]Jay Im
A 40-to-56 Gb/s PAM-4 Receiver With Ten-Tap Direct Decision-Feedback Equalization in 16-nm FinFET. IEEE J. Solid State Circuits 52(12): 3486-3502 (2017) - [c3]Jay Im, Dave Freitas, Arianne Roldan, Ronan Casey, Stanley Chen, Adam Chou, Tim Cronin, Kevin Geary, Scott McLeod, Lei Zhou, Ian Zhuang, Jaeduk Han, Sen Lin, Parag Upadhyaya, Geoff Zhang, Yohan Frans, Ken Chang:
6.3 A 40-to-56Gb/s PAM-4 receiver with 10-tap direct decision-feedback equalization in 16nm FinFET. ISSCC 2017: 114-115 - 2015
- [j1]Reza Navid, E-Hung Chen, Masum Hossain, Brian S. Leibowitz, Jihong Ren, Chuen-Huei Adam Chou, Barry Daly, Marko Aleksic, Bruce Su, Simon Li, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble:
A 40 Gb/s Serial Link Transceiver in 28 nm CMOS Technology. IEEE J. Solid State Circuits 50(4): 814-827 (2015) - 2014
- [c2]E-Hung Chen, Masum Hossain, Brian S. Leibowitz, Reza Navid, Jihong Ren, Chuen-Huei Adam Chou, Barry Daly, Marko Aleksic, Bruce Su, Simon Li, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble:
A 40-Gb/s serial link transceiver in 28-nm CMOS technology. VLSIC 2014: 1-2 - [c1]Masum Hossain, E-Hung Chen, Reza Navid, Brian S. Leibowitz, Chuen-Huei Adam Chou, Simon Li, Myeong-Jae Park, Jihong Ren, Barry Daly, Bruce Su, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble:
A 4×40 Gb/s quad-lane CDR with shared frequency tracking and data dependent jitter filtering. VLSIC 2014: 1-2
Coauthor Index
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