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Masoud Shahshahani
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2020 – today
- 2022
- [c7]Pingakshya Goswami, Masoud Shahshahani, Dinesh Bhatia
:
MLSBench: A Benchmark Set for Machine Learning based FPGA HLS Design Flows. LASCAS 2022: 1-4 - [c6]Masoud Shahshahani, Dinesh Bhatia
PPA Based CNN Architecture Explorer. LASCAS 2022: 1-4 - [c5]Pingakshya Goswami, Masoud Shahshahani, Dinesh Bhatia
Robust Estimation of FPGA Resources and Performance from CNN Models. VLSID 2022: 144-149 - 2021
- [c4]Masoud Shahshahani, Dinesh Bhatia
Resource and Performance Estimation for CNN Models using Machine Learning. ISVLSI 2021: 43-48 - [c3]Masoud Shahshahani, Mohammad Sabri Abrebekoh, Bahareh Khabbazan, Dinesh Bhatia
An Automated Tool for Implementing Deep Neural Networks on FPGA. VLSID 2021: 322-327 - 2020
- [c2]Pingakshya Goswami, Masoud Shahshahani, Dinesh Bhatia:
MLSBench: A Synthesizable Dataset of HLS Designs to Support ML Based Design Flows. FPGA 2020: 312
2010 – 2019
- 2016
- [c1]Mahsa Shoaran
A 16-channel 1.1mm2 implantable seizure control SoC with sub-μW/channel consumption and closed-loop stimulation in 0.18µm CMOS. VLSI Circuits 2016: 1-2
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last updated on 2024-08-16 18:34 CEST by the dblp team
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