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Seyyed Hossein Seyyedaghaei Rezaei
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2020 – today
- 2024
- [j4]Seyyed Hossein Seyyedaghaei Rezaei
, Parham Zilouchian Moghaddam
Smart Memory: Deep Learning Acceleration in 3D-Stacked Memories. IEEE Comput. Archit. Lett. 23(1): 137-141 (2024) - 2023
- [c3]Ali Monavari Bidgoli, Sepideh Fattahi, Seyyed Hossein Seyyedaghaei Rezaei, Mehdi Modarressi, Masoud Daneshtalab:
NeuroPIM: Felxible Neural Accelerator for Processing-in-Memory Architectures. DDECS 2023: 51-56 - 2022
- [j3]Mehdi Modarressi, Seyyed Hossein Seyyedaghaei Rezaei:
Chapter Seven - Power-efficient network-on-chip design by partial topology reconfiguration. Adv. Comput. 124: 217-255 (2022) - 2020
- [j2]Seyyed Hossein Seyyedaghaei Rezaei
NoM: Network-on-Memory for Inter-Bank Data Transfer in Highly-Banked Memories. IEEE Comput. Archit. Lett. 19(1): 80-83 (2020) - [i1]Seyyed Hossein Seyyedaghaei Rezaei, Mehdi Modarressi, Rachata Ausavarungnirun, Mohammad Sadrosadati, Onur Mutlu, Masoud Daneshtalab:
NOM: Network-On-Memory for Inter-Bank Data Transfer in Highly-Banked Memories. CoRR abs/2004.09923 (2020)
2010 – 2019
- 2016
- [j1]Seyyed Hossein Seyyedaghaei Rezaei, Abbas Mazloumi, Mehdi Modarressi, Pejman Lotfi-Kamran:
Dynamic Resource Sharing for High-Performance 3-D Networks-on-Chip. IEEE Comput. Archit. Lett. 15(1): 5-8 (2016) - [c2]Seyyed Hossein Seyyedaghaei Rezaei, Mehdi Modarressi, Reza Yazdani Aminabadi, Masoud Daneshtalab:
Fault-tolerant 3-D network-on-chip design using dynamic link sharing. DATE 2016: 1195-1200 - [c1]Seyyed Hossein Seyyedaghaei Rezaei, Mehdi Modarressi, Masoud Daneshtalab, Shervin Roshanisefat:
A Three-Dimensional Networks-on-Chip Architecture with Dynamic Buffer Sharing. PDP 2016: 771-776
Coauthor Index
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