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Sheyang Ning
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2020 – today
- 2020
- [j6]Sheyang Ning:
Improving Resistive RAM Hard and Soft Decision Correctable BERs by Using Improved-LLR and Reset-Check-Reverse-Flag Concatenating LDPC Code. IEEE Trans. Circuits Syst. II Express Briefs 67-II(10): 2164-2168 (2020)
2010 – 2019
- 2018
- [j5]Sheyang Ning:
Advanced Bit Flip Concatenates BCH Code Demonstrates 0.93% Correctable BER and Faster Decoding on (36 864, 32 768) Emerging Memories. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(12): 4404-4412 (2018) - 2016
- [j4]Hirofumi Takishita, Shuhei Tanakamaru, Sheyang Ning, Ken Takeuchi:
Variation of SCM/NAND Flash Hybrid SSD Performance, Reliability and Cost by Using Different SSD Configurations and Error Correction Strengths. IEICE Trans. Electron. 99-C(4): 444-451 (2016) - [j3]Sheyang Ning, Tomoko Ogura Iwasaki, Shuhei Tanakamaru, Darlene Viviani, Henry Huang, Monte Manning, Thomas Rueckes, Ken Takeuchi:
Reset-Check-Reverse-Flag Scheme on NRAM With 50% Bit Error Rate or 35% Parity Overhead and 16% Decoding Latency Reductions for Read-Intensive Storage Class Memory. IEEE J. Solid State Circuits 51(8): 1938-1951 (2016) - [j2]Tomoya Ishii, Sheyang Ning, Masahiro Tanaka, Kota Tsurumi, Ken Takeuchi:
Adaptive Comparator Bias-Current Control of 0.6 V Input Boost Converter for ReRAM Program Voltages in Low Power Embedded Applications. IEEE J. Solid State Circuits 51(10): 2389-2397 (2016) - 2015
- [j1]Shuhei Tanakamaru, Hiroki Yamazawa, Tsukasa Tokutomi, Sheyang Ning, Ken Takeuchi:
Design Methodology for Highly Reliable, High Performance ReRAM and 3-Bit/Cell MLC NAND Flash Solid-State Storage. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(3): 844-853 (2015) - [c3]Shogo Hachiya, Takahiro Onagi, Sheyang Ning, Ken Takeuchi:
Comprehensive comparison of 3D-TSV integrated solid-state drives (SSDs) with storage class memory and NAND flash memory. 3DIC 2015: TS6.2.1-TS6.2.5 - [c2]Tomoya Ishii, Shogo Hachiya, Sheyang Ning, Masahiro Tanaka, Ken Takeuchi:
0.6 V operation, 26% smaller voltage ripple, 9% energy efficient boost converter with adaptively optimized comparator bias-current for ReRAM program in low power IoT embedded applications. A-SSCC 2015: 1-4 - 2014
- [c1]Shuhei Tanakamaru, Hiroki Yamazawa, Tsukasa Tokutomi, Sheyang Ning, Ken Takeuchi:
19.6 Hybrid storage of ReRAM/TLC NAND Flash with RAID-5/6 for cloud data centers. ISSCC 2014: 336-337
Coauthor Index
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