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Laura Fick
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2020 – today
- 2022
- [c8]Laura Fick, Skylar Skrzyniarz, Malav Parikh, Michael B. Henry, David Fick:
Analog Matrix Processor for Edge AI Real-Time Video Analytics. ISSCC 2022: 260-262
2010 – 2019
- 2019
- [c7]Laura Fick, Dave Fick:
Introduction to Compute-in-Memory. CICC 2019: 1-65 - 2017
- [j2]Qing Dong
, Kaiyuan Yang
Low-Power and Compact Analog-to-Digital Converter Using Spintronic Racetrack Memory Devices. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 907-918 (2017) - [c6]Laura Fick, David T. Blaauw, Dennis Sylvester, Skylar Skrzyniarz, Malav Parikh, David Fick:
Analog in-memory subthreshold deep neural network accelerator. CICC 2017: 1-4 - [c5]Qing Dong, Kaiyuan Yang
Rectified-linear and recurrent neural networks built with spin devices. ISCAS 2017: 1-4 - [c4]Laura Fick, Dennis Sylvester, John W. Poulton, John M. Wilson, C. Thomas Gray:
A 25 Gb/s 470 μW active inductor equalizer for ground referenced signaling receivers. ISCAS 2017: 1-4 - [c3]Suyoung Bang, Jingcheng Wang, Ziyun Li, Cao Gao, Yejoong Kim
14.7 A 288µW programmable deep-learning processor with 270KB on-chip weight storage using non-uniform memory hierarchy for mobile intelligence. ISSCC 2017: 250-251 - 2016
- [c2]Skylar Skrzyniarz, Laura Fick, Jinal Shah, Yejoong Kim
24.3 A 36.8 2b-TOPS/W self-calibrating GPS accelerator implemented using analog calculation in 65nm LP CMOS. ISSCC 2016: 420-422 - 2015
- [c1]Qing Dong, Kaiyuan Yang
Racetrack converter: A low power and compact data converter using racetrack spintronic devices. ISCAS 2015: 585-588 - 2014
- [j1]Laura Fick, David Fick, Massimo Alioto, David T. Blaauw, Dennis Sylvester:
A 346 µm 2 VCO-Based, Reference-Free, Self-Timed Sensor Interface for Cubic-Millimeter Sensor Nodes in 28 nm CMOS. IEEE J. Solid State Circuits 49(11): 2462-2473 (2014)
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