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Anirudh M. Kaushik
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2020 – today
- 2024
- [j6]Zhuanhao Wu
, Anirudh M. Kaushik
High Performance and Predictable Shared Last-level Cache for Safety-Critical Systems. ACM Trans. Embed. Comput. Syst. 23(6): 97:1-97:30 (2024) - 2023
- [j5]Artem Klashtorny
Predictable GPU Wavefront Splitting for Safety-Critical Systems. ACM Trans. Embed. Comput. Syst. 22(5s): 107:1-107:25 (2023) - [c12]Zhuanhao Wu, Anirudh M. Kaushik, Hiren D. Patel:
ZeroCost-LLC: Shared LLCs at No Cost to WCL. RTAS 2023: 249-261 - 2022
- [j4]Anirudh Mohan Kaushik
Automatic Construction of Predictable and High-Performance Cache Coherence Protocols for Multicore Real-Time Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(10): 3318-3331 (2022) - 2021
- [b1]Anirudh Mohan Kaushik:
Timing Predictable and High-Performance Hardware Cache Coherence Mechanisms for Real-Time Multi-Core Platforms. University of Waterloo, Ontario, Canada, 2021 - [j3]Anirudh Mohan Kaushik, Gennady Pekhimenko, Hiren D. Patel:
Gretch: A Hardware Prefetcher for Graph Analytics. ACM Trans. Archit. Code Optim. 18(2): 18:1-18:25 (2021) - [j2]Anirudh Mohan Kaushik
Designing Predictable Cache Coherence Protocols for Multi-Core Real-Time Systems. IEEE Trans. Computers 70(12): 2098-2111 (2021) - [c11]Anirudh Mohan Kaushik, Hiren D. Patel:
Automated Synthesis of Predictable and High-Performance Cache Coherence Protocols. DATE 2021: 816-821 - [c10]Zhuanhao Wu
A Hardware Platform for Exploring Predictable Cache Coherence Protocols for Real-time Multicores. RTAS 2021: 92-104 - [c9]Anirudh Mohan Kaushik, Hiren D. Patel:
A Systematic Approach to Achieving Tight Worst-Case Latency and High-Performance Under Predictable Cache Coherence. RTAS 2021: 105-117
2010 – 2019
- 2019
- [c8]Anirudh Mohan Kaushik, Ashwin M. Aji, Muhammad Amber Hassaan, Noel Chalmers, Noah Wolfe, Scott Moe, Sooraj Puthoor, Bradford M. Beckmann:
Optimizing Hyperplane Sweep Operations Using Asynchronous Multi-grain GPU Tasks. IISWC 2019: 59-69 - [c7]Anirudh M. Kaushik, Paulos Tegegn, Zhuanhao Wu, Hiren D. Patel:
CARP: A Data Communication Mechanism for Multi-core Mixed-Criticality Systems. RTSS 2019: 419-432 - [c6]Nivedita Sritharan, Anirudh M. Kaushik, Mohamed Hassan
Enabling Predictable, Simultaneous and Coherent Data Sharing in Mixed Criticality Systems. RTSS 2019: 433-445 - 2018
- [j1]Mohamed Hassan
Exposing Implementation Details of Embedded DRAM Memory Controllers through Latency-based Analysis. ACM Trans. Embed. Comput. Syst. 17(5): 90:1-90:25 (2018) - 2017
- [c5]Mohamed Hassan
Predictable Cache Coherence for Multi-core Real-Time Systems. RTAS 2017: 235-246 - [i1]Nivedita Sritharan, Anirudh M. Kaushik, Mohamed Hassan, Hiren D. Patel:
HourGlass: Predictable Time-based Cache Coherence Protocol for Dual-Critical Multi-Core Systems. CoRR abs/1706.07568 (2017) - 2015
- [c4]Mohamed Hassan
Reverse-engineering embedded memory controllers through latency-based analysis. RTAS 2015: 297-306 - 2013
- [c3]Valeria Bertacco, Debapriya Chatterjee, Nicola Bombieri, Franco Fummi, Sara Vinco, Anirudh M. Kaushik, Hiren D. Patel:
On the use of GP-GPUs for accelerating compute-intensive EDA applications. DATE 2013: 1357-1366 - [c2]Anirudh M. Kaushik, Hiren D. Patel:
Systemc-clang: An open-source framework for analyzing mixed-abstraction SystemC models. FDL 2013: 1-8 - 2012
- [c1]Mahesh Nanjundappa, Anirudh M. Kaushik, Hiren D. Patel, Sandeep K. Shukla
Accelerating SystemC simulations using GPUs. HLDVT 2012: 132-139
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